ESX_ESXi_4.1/1.20.00.15.vmk.1104180000755000000000000000000000000011625410266012154 5ustar ESX_ESXi_4.1/1.20.00.15.vmk.110418/README.txt0000755000000000000000000000552711556527326013756 0ustar Areca Driver Disk for ARC-11XX/12XX/16XX/18XX on VMware ESX(i) 4.X Notice : VMware officially does not support async drivers' device to be the ESXi 4.x system disks. Consequently, Areca RAID volumes can only be the data storages on ESXi 4.x. Installation for VMware ESX 4.X on Areca RAID volume(s): 1). Install Areca SAS RAID controller, and configure RAID/volume(s). 2). During ESX installation, select "Add" in the Custom Drivers menu, insert the device driver CD, and click OK. 3). Browse for the driver to install and click OK. 4). When prompted, replace the driver CD with the ESX 4.X CD, and then click Next. 5). Continue the ESX 4.X installation. 6). When finished, reboot the server. Installation for Areca RAID volume(s) as data storage: for VMware ESX4.X: 1). Power on ESX4.0 server. 2). Use the following command to install the driver or remove and reinstall the driver if you have installed a driver: First, query the vib name via the following command, #@$ esxupdate query --vib-view | grep arcmsr Then, remove the existing Areca driver, #@$ esxupdate -b remove --maintenancemode Finally, update RAID controller driver with CD #@$ mkdir /ISO #@$ mount /dev/cdrom /ISO #@$ esxupdate update --bundle=/ISO/offline-bundle/offline-bundle.zip --maintenancemode or, update RAID controller driver with vib file #@$ esxupdate update -b vmware-esx-drivers-scsi-arcmsr-400.1.20.00.15.vmk.110418-1OEM.x86_64.vib --maintenancemode --nosigcheck 3). Run the following commands: List the driver package details and verify the new driver installed: #@$ esxupdate query --vib-view | grep arcmsr Verify that the OS recognizes Areca RAID controller volumes: #@$ esxcfg-scsidevs -a 4). Reboot ESX 4.X server. for VMware ESXi 4.X: 1). Insert the Areca driver disk on your Windows system. 2). Download and install the VMware vSphere Client and VMware vSphere CLI on your Windows system. 2.1). If you have a older driver, please remove it from ESXi terminal by, #@$ esxupdate -b ARC remove --maintenancemode 3). Launch VMware vSphere Client and login the ESXi 4.X server. 4). Through VMware Vsphere Client, set ESXi 4.X server into "Maintenance Mode".(select Inventory-->Summary tab-->Enter Maintanence Mode) 5). Launch VMware vSphere CLI. 6). key in "cd bin" on VMware vSphere CLI. 7). key in "perl vihostupdate.pl -server ESXi_4.X_IP_address -username root -password "root's password" -b CD/DVD_ROM_directory:\offline-bundle\offline-bundle.zip --nosigcheck -i" on VMware vSphere CLI 8). After loading Areca driver is finished, close VMware vSphere CLI. 9). Exit maintenance mode on the ESXi 4.X server through VMware Vsphere Client. 10). Reboot ESXi 4.X server. 11). As the ESXi 4.X server comes back, you should see the storage device(s) on the ESXi 4.X server through VMware vSphere Client. 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Consequently, Areca RAID volumes can only be the data storages on ESXi 4.x. Installation for VMware ESX 4.X on Areca RAID volume(s): 1). Install Areca SAS RAID controller, and configure RAID/volume(s). 2). During ESX installation, select "Add" in the Custom Drivers menu, insert the device driver CD, and click OK. 3). Browse for the driver to install and click OK. 4). When prompted, replace the driver CD with the ESX 4.X CD, and then click Next. 5). Continue the ESX 4.X installation. 6). When finished, reboot the server. Installation for Areca RAID volume(s) as data storage: for VMware ESX4.X: 1). Power on ESX4.0 server. 2). Use the following command to install the driver or remove and reinstall the driver if you have installed a driver: First, query the vib name via the following command, #@$ esxupdate query --vib-view | grep arcmsr Then, remove the existing Areca driver, #@$ esxupdate -b remove --maintenancemode Finally, update RAID controller driver with CD #@$ mkdir /ISO #@$ mount /dev/cdrom /ISO #@$ esxupdate update --bundle=/ISO/offline-bundle/offline-bundle.zip --maintenancemode or, update RAID controller driver with vib file #@$ esxupdate update -b vmware-esx-drivers-scsi-arcmsr-400.1.20.00.15.vmk.110418-1OEM.x86_64.vib --maintenancemode --nosigcheck 3). Run the following commands: List the driver package details and verify the new driver installed: #@$ esxupdate query --vib-view | grep arcmsr Verify that the OS recognizes Areca RAID controller volumes: #@$ esxcfg-scsidevs -a 4). Reboot ESX 4.X server. for VMware ESXi 4.X: 1). Insert the Areca driver disk on your Windows system. 2). Download and install the VMware vSphere Client and VMware vSphere CLI on your Windows system. 2.1). If you have a older driver, please remove it from ESXi terminal by, #@$ esxupdate -b ARC remove --maintenancemode 3). Launch VMware vSphere Client and login the ESXi 4.X server. 4). Through VMware Vsphere Client, set ESXi 4.X server into "Maintenance Mode".(select Inventory-->Summary tab-->Enter Maintanence Mode) 5). Launch VMware vSphere CLI. 6). key in "cd bin" on VMware vSphere CLI. 7). key in "perl vihostupdate.pl -server ESXi_4.X_IP_address -username root -password "root's password" -b CD/DVD_ROM_directory:\offline-bundle\offline-bundle.zip --nosigcheck -i" on VMware vSphere CLI 8). After loading Areca driver is finished, close VMware vSphere CLI. 9). Exit maintenance mode on the ESXi 4.X server through VMware Vsphere Client. 10). Reboot ESXi 4.X server. 11). As the ESXi 4.X server comes back, you should see the storage device(s) on the ESXi 4.X server through VMware vSphere Client. ESX_ESXi_4.1/1.20.00.15.vmk.110418/vmware-esx-drivers-scsi-arcmsr-400.1.20.00.15.vmk.110418/arcmsr.iso000075500000000000000000015200001155622013025120 0ustar CD001LINUX CDROM &&"o   MKISOFS ISO 9660/HFS FILESYSTEM BUILDER & CDRECORD CD-R/DVD CREATOR (C) 1993 E.YOUNGDALE (C) 1997 J.PEARSON/J.SCHILLING 2011042818102800 2011042818102800 00000000000000002011042818102800  CD001LINUX CDROM %/E>>"o   MKISOFS ISO 9660_HFS FILESYSTEM BUILDER & CDRECORD CD-R_DVD CREA 2011042818102800 2011042818102800 00000000000000002011042818102800  CD001MKI Thu Apr 28 18:10:28 2011 mkisofs 2.01 -o arcmsr.iso -m .../.. -R -J -T .../isoOFFLINE__RPMOFFLINE__RPM!.rpm offline-bundle!.rpm offline-bundleo  SPRRPX$AATFo  o  o  CE""fo  RRPX$TFo  o  o  ##&&o   DRIVERS.XML;1RRNMdrivers.xmlPX$TFo  o  o  o  OFFLINE_RRNMoffline-bundlePX$AATFo  o  o  ~$$o   TRANS.TBL;1RRNMTRANS.TBLPX$$$TFo  o  o  ro  _RPMRRNM .rpmPX$AATFo  o  o  fo  RRPX$AATFo  o  o  fo  RRPX$AATFo  o  o  %% ^^ o  OFFLINE_.ZIP;1RRNMoffline-bundle.zipPX$TFo  o  o  ~11o   TRANS.TBL;1RRNMTRANS.TBLPX$$$TFo  o  o  fo  RRPX$AATFo  o  o  fo  RRPX$AATFo  o  o  ~22o   TRANS.TBL;1RRNMTRANS.TBLPX$$$TFo  o  o  33$UU$o  VMWARE_E.RPM;1RRNMMvmware-esx-drivers-scsi-arcmsr-400.1.20.00.15.vmk.110418-1OEM.x86_64.rpmPX$TFo  o  o  "o  "o  *!!o  .rpm4$$o  TRANS.TBL8##&&o  drivers.xml> o  offline-bundle" o  "o  411o  TRANS.TBLF%% ^^ o  $offline-bundle.zip"!!o  "o  422o  TRANS.TBL33$UU$o  vmware-esx-drivers-scsi-arcmsr-400.1.20.00.15.vmk.110418-1OEM.x8ER TRRIP_1991ATHE ROCK RIDGE INTERCHANGE PROTOCOL PROVIDES SUPPORT FOR POSIX FILE SYSTEM SEMANTICSPLEASE CONTACT DISC PUBLISHER FOR SPECIFICATION SOURCE. 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@ GHI X$Y(\P]\^bdefklCvmware-esx-drivers-scsi-arcmsr400.1.20.00.15.vmk.1002021.0.4.00000arcmsr: scsi driver for VMware ESXAreca (ARC-11xx/12xx/16xx/18xx) SATA/SAS RAID Controller DriverKApa-lin-bld378.eng.vmware.comDebiansee /usr/share/doc/vmware-esx-drivers-scsi-arcmsr/copyrightConverted/unknownlinuxx86_64#!/bin/sh set -e mkdir /tmp/alien.$$ perl -pe '$_=unpack("u",$_)' << '__EOF__' > /tmp/alien.$$/script M:68@6R`M>"`B+W5S /tmp/alien.$$/script M(PHC($-/4RUO;FQY.R!S8VAE9'5L92!R96)U:6QD(&]F(&EN:71R9"X@(%1H M:7,@8GD@:71S96QF('=I;&P*(R!S8VAE9'5L92!A(')E8G5I;&0@;V8@:6YI M=')D(&QA=&5R+"!B=70@:70@:7,@;F]T(&%S"B,@&-F9RUB;V]T(&-A;B!F86EL(&QA M=&5R"B,@86YD('EO=2!W;W5L9"!N979E&-F9RUB;V]T("TM /tmp/alien.$$/script M:68@6R`M>"`B+W5S /tmp/alien.$$/script M(PHC($-/4RUO;FQY.R!S8VAE9'5L92!R96)U:6QD(&]F(&EN:71R9"X@(%1H M:7,@8GD@:71S96QF('=I;&P*(R!S8VAE9'5L92!A(')E8G5I;&0@;V8@:6YI M=')D(&QA=&5R+"!B=70@:70@:7,@;F]T(&%S"B,@&-F9RUB;V]T(&-A;B!F86EL(&QA M=&5R"B,@86YD('EO=2!W;W5L9"!N979E&-F9RUB;V]T("TM159ceb27e1f2112c59b67313dc148cb1411ef0cef9ed8b82cc675daf9f98a6d6f34da4f48c91f8f0b414488c71c3aa1erootrootrootrootrootrootvmware-esx-drivers-scsi-arcmsr-400.1.20.00.15.vmk.100202-1.0.4.00000.src.rpmvmware-esx-drivers-scsi-arcmsr@@@@ @@JJperlcoreutilsDriverAPI-9.0/bin/sh/bin/sh/bin/sh/bin/shrpmlib(PayloadFilesHavePrefix)rpmlib(CompressedFileNames)4.0-13.0.4-14.0.5/bin/sh/bin/sh/bin/sh/bin/shhhhʗm|?W400.1.20.00.15.vmk.100202-1.0.4.00000areca-arcmsr.mfarcmsr.xmlarcmsr.o/etc/vmware/init/manifests//etc/vmware/pciid//usr/lib/vmware/vmkmod/-O2 -gcpiogzip9x86_64x86_64-redhat-linux?GK/build/mts/release/bora-262812/tmp/tmphpYXc_.vibpublish-rpm/vmware-esx-drivers-scsi-arcmsr-400.1.20.00.15.vmk.100202-1.0.4.00000.x86_64.rpm} x[Օ%I$dݐ%O]Ŗ-K[KldyLt ma:3̟6)giP5i2ڄ !$$<$3|ߨM{{K\_/J 5zT=+ӿjQ ZNqȈLrzHaÑp!@N2G-h4g د+C>oT'*t=Xoo(5/N~LWVdWtzIAb=>͊o];+~gw\ UTV.3,ּP;hoV@Hu\`(w/@ .w&0=[&2(įRx} F[hl4E8z.r{ nJƭrEXP*뚹k5q#hXǹ;3$TahPs}+a?ܺhP J:OtNw]uΡ A H6+] V (%IYR6KY*Hf)V6K,Jf1X,_)ۥKm2E}Rl/]ʕRT d6Jv)}SK,P$΀? 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vEF%'ϫAvSF}O4${y|VMI yWը=&8^DIsmK>%[ܚlfD+LR|N?i^=eo y|bOuAqߎ֠ss۩7dxm )֜X)Ç-wy qOڶ)@8Bt8,]ʟ~ye[Eɻڧj<+/5xV/[CRhݳre;<+uiDcuhOyƹ[B\\^F=G_Ds2TƳRsY Id֑fQ';IQ+W guvx:#J & Fe~eS0͓=-h Ƚ=7O`v FՌ>ljޑݯ|t{'h9]oEj԰'d m%t⃐mfJ8ρf>CKDtH`xFMxi>8`qO"qD-#'b&,4E[iۨyŝxԿoS@{9,mh&߁b ]J"?Ź rl!P R3ɍ}@'ƢzޓOA"0U#ɦHw+zߡ{ ~l_ 2K.xF4yT;t6iOHvיLv-o۬b(b24Mb{P;P +wh6W-\~t۹Yo§C2ȝ2>{ OP/4J<w#ugD D>ÇhH6>6,XmӇBe β$&ѿCE"hr3~nLKb|!W(RAv%q|Nyq/4}|nK\m6y$oG\-V2`4830 'zKi.1OE0Z{v{Э?wV۳p_sgt;0:0཭ h\,5hg @N|ji]ɔoxehѣ#X3,?2{>/L'y>uQ~pl|| QOp{4ټִ_ts<1n6 urAb4.S'_B==߳niqsC :ȢD9Գ"KL̠+ ˨Y>!|CAOG2)0KD5^4C:+8q_/ybw~o g$RM߆6vcކwe!SBhY<9dx165wj.!ut럣,ВmەK}t>_QP)@k3/hڡ0uquC7gwL^r23df@b?Cb&qM~H!Cl2gT2L]GшlNj(5uδ1P̦ m7j]o@SOL〃X8񸔊"i a4lU% 1iIL]G^Y@+0kԝLv)حǶEa>*ޏ#Z従Alxq/ˈ3**ix깗H~ЊRO;ѝ,ْ?@{ %\|5Ϊook0#,ls)7 K_`~/ChD(m#&alk ]/R e&2jAPE 3}Ll4$\&HLug\` H`莡)|4\nGG8:@ btm3xav%=?"չΙ.2_#VeӸrihOitO4'y4'旜Pjj}" 1{}@3Qp (Gb ž&h2!Y_ GmDIUy`0?kg:}aߔLIn~ >OOm2of볕f 3Qc*8fJq=Y3g*_>SM~Le3x1O𙕛¿śT;|'wgu:"|N^O 5xw2je{u_I>?Z9<`+߭~]_WcPוyE]5)nQoFY(3kk婻VY# W*ۮUnе)˿DL v|uySgbɂ15 ^* ndp3fofY4z]k10<.28|U;< nH츾Ay~c > qgxQ \`0 ʅ);]g+c \l[8P.,J ~kU [̟) ݤǖAvݷDYoe2kK˜~~3?˔[L.S]0j^g# neU))T|J6} `zҫ )+ 277y ~;X.Vs7'UoVg| Sbֳ3T߫TIfD9O[^/џ®|^ccpWI|Aը)Rs+-(/v}ҿ*{RͲtz]YeeWc12帷GXsmp[vGGt?![sex;]Gϖl u<M)~ Gdt} u}oD0 Ե;@҅Q׵Pш.O w&8NBݬYh(9iD u+u7tyj\i!Ga{s>fdnjF7H~x1Y++A;w1aw!zz߱S&'EHEEpHᎀd==П; @B{)V;#E~$ cs>vCLꅬX[( I3]])I>9H($Jd5[ GB0 ~!6a͡I ?K*1Y xTTw1zO8$MN;D}\JWRϣ+igH[^ s:=rJ~5VtEzrCr4E9Mߜ < QgD;܊j@Du&qu^ׇ<{0dpxЁ akЎy!=ް9 ^XrDra ?"J}MZut1.TWu׊78`zR7`HW*:B6d6/q4ts=QASgMoK]TPiD{tH#Cq)OܤɈg|m J9x4L=ˤ3JQnlS)>Tʟf7Z5Mꬑrtl9}S8gFH΃e|`+?KgAVgtOt&Da%T[&vZS=2<=M.@[:$l&gIKiL1@)R9UߗɌ}{<@׳̈Ϭ(l?DsJSl9I~Q?jesjGv`&KLjII7+-1Y~{ZߤRZޠ$hl}H3V#9L%JTǴ'??OcKOsވ ZL;E.8QP63W4-b:IdJ<{sCgKĻk5r8'Jo)޽,Wwo崾|)\jc ?Hd|l ŏ2 OE2|~^LǨvp)@(>%[}tNj>@ CQ~{dx _xTF3,>^WsS<(ÃR ŏIz tGX 2|&ß1dK9w~l?exdŃ24=W-*\wr7^GתW(M&ӯ5Ґpi}ex3ťu4).W5¥G>ťғz zi>3AyK1ʓ!/ťuz<:_(n4HťzJ.'vyK먟RQ/Kr^}K(ISg).t<:^Hqi%ݕw_㧸{Pz7+WKvW$RrC^ZwI*I1M=,JⒿ`<5ޫn7(>*0~nPB2|w;)GNBOTY29#Sg3MۚEOE2/ߠx AqGqN68NY M)4?)OeݳQ|JD27\(d2$>2$'%seԟex^6wR%V&qc 3}^+fM߭+431GT2H.}R>'G~^?;%YB_952CޫoQ~o???OK&Cqi_%NqiOr,NO@P| v9| _8Uc]A3d9m {vB >MHoI{nT#+gTs P7LҮI~^B VU]^?RS?YO* \?ǥyHʷs+UFg&] *UQH\bWR^ Y~gF:n,eUTUp NߨK\0Fѥ6?D)yw8pT¾MQJo)&EPow܊yyXQDr8Rv^F)ꎦ4ZZ\s1O/ DZJP"Œ@lqQꊆ#ȩ۰8``3YnƞO\CJVVotbх{ncd"1+>݃4 3AM}a<h$>_ejORkXml.y6vnzKgkt[nk4njUfs6cEySm8h96rl aWYZʹNkybg828F$08a6r\_po.]gjd%3[urf[3o暪;Ts-Z_O{c9fIŸ*:klնK5WV_l82eXbh7GeռohhvbƦhӸδIUͯsY4ڼtb7H`3Dβi5̈Qc4[ kuښ,}f>_#Z5aWmEk!-u}kK˪<޿Sm}56Vy*F\ވܜ[]STѱ*gj44K [|a}MiWZdo(7ջ֯7{%Q;;}uM{g^g]]ZnD훪M}{QػvUy]sk8,닼5"Q\W%u]wMz[ó߶dm5k - WF{sA`kۺl6om%PwS'dpmn1km>X^ZVgHkf5nVJ-7s;a1r%Y0;Wݷfu_)pK!00hkXZ_e[Vw9űU뗬ԱfUzgPT^ߴٙg[=yZ$ۭŎu>ǒPIOwac*-]UTjfۘW]Sj4+r|GSپ&tꪃ݁_kkSlI}ӦpyY|Mex}iM^gyo. ëE%ESemIWJג`PV_Y[oluTtuUp=\gצHتPG]wow-ݎqMg٧_U\׿dI,h:5+\y`lsʕy8a1יEEA*o.S'}Ɯ+z{U\]%{&ڿQmM,iE=z*WvǫZ5.0{JwM?a?FǘTCM<\a?!Q;_mOVJ<f9CnOߪR;ΐZT_q(J;;mvZA=/offline-bundle/ and locate the .zip file. 5. Run the esxupdate command to install drivers using the offline bundle. esxupdate --bundle=.zip update C) To update or add drivers on existing ESX and ESXi installations using vihostupdate: (for both ESX and ESXi) 1. Power on the ESX or ESXi host. 2. Place the driver CD in the CD-ROM drive of the host where either the vSphere CLI package is installed or vMA is hosted. 3. Mount the driver CD. 4. Navigate to /offline-bundle/ and locate the .zip file. 5. Run the vihostupdate command to install drivers using the offline bundle. vihostupdate --install --bundle .zip (For more details on vihostupdate, see the vSphere Command-Line Interface Installation and Reference Guide.) ESX_ESXi_4.1/1.20.00.15_100202/1.20.00.15_100202/doc/open_source_licenses_vmware-esx-drivers-scsi-arcmsr_400.1.20.0000007550000000000000000000055027345 7515730 0ustar open_source_licenses_async_driver_Areca_SATA/SAS_RAID_Host_Bus_Adapter_Driver_1.20.0x .15.vmk.90605.txt VMware ESX & ESXi 4.0 Async Driver -- Areca SATA/SAS RAID Host Bus Adapter Driver 1.20.0x.15.vmk.90605 ================================================================================ The following copyright statements and licenses apply to various open source software components that are distributed with various VMware software products. The VMware product that includes this file does not necessarily use all the open source software components referred to below. ================================================================================ > Areca SATA/SAS RAID Host Bus Adapter Driver 1.20.0x.15.vmk.90605: Areca driver source codes, arcmsr.c & arcmsr.h, are published by Areca Technology Corporation on 8F., No.22, Lane 35, Ji-Hu Rd., Taipei, Taiwan, R.O.C., and copyrighted, (C) 2005 - 2020, by Areca Technology Corporation. All rights reserved. For the license, please refer to LICENSE.txt. From LICENSE.txt: Copyright (C) 2005 - 2020, Areca Technology Corporation All rights reserved. Website: www.areca.com.tw E-mail: support@areca.com.tw This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License version 2 as published by the Free Software Foundation. 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If any portion of this section is held invalid or unenforceable under any particular circumstance, the balance of the section is intended to apply and the section as a whole is intended to apply in other circumstances. It is not the purpose of this section to induce you to infringe any patents or other property right claims or to contest validity of any such claims; this section has the sole purpose of protecting the integrity of the free software distribution system, which is implemented by public license practices. Many people have made generous contributions to the wide range of software distributed through that system in reliance on consistent application of that system; it is up to the author/donor to decide if he or she is willing to distribute software through any other system and a licensee cannot impose that choice. This section is intended to make thoroughly clear what is believed to be a consequence of the rest of this License. 8. If the distribution and/or use of the Program is restricted in certain countries either by patents or by copyrighted interfaces, the original copyright holder who places the Program under this License may add an explicit geographical distribution limitation excluding those countries, so that distribution is permitted only in or among countries not thus excluded. In such case, this License incorporates the limitation as if written in the body of this License. 9. The Free Software Foundation may publish revised and/or new versions of the General Public License from time to time. Such new versions will be similar in spirit to the present version, but may differ in detail to address new problems or concerns. Each version is given a distinguishing version number. If the Program specifies a version number of this License which applies to it and "any later version", you have the option of following the terms and conditions either of that version or of any later version published by the Free Software Foundation. If the Program does not specify a version number of this License, you may choose any version ever published by the Free Software Foundation. 10. If you wish to incorporate parts of the Program into other free programs whose distribution conditions are different, write to the author to ask for permission. For software which is copyrighted by the Free Software Foundation, write to the Free Software Foundation; we sometimes make exceptions for this. Our decision will be guided by the two goals of preserving the free status of all derivatives of our free software and of promoting the sharing and reuse of software generally. NO WARRANTY 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING, REPAIR OR CORRECTION. 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. END OF TERMS AND CONDITIONS How to Apply These Terms to Your New Programs If you develop a new program, and you want it to be of the greatest possible use to the public, the best way to achieve this is to make it free software which everyone can redistribute and change under these terms. To do so, attach the following notices to the program. It is safest to attach them to the start of each source file to most effectively convey the exclusion of warranty; and each file should have at least the "copyright" line and a pointer to where the full notice is found. one line to give the program's name and an idea of what it does. Copyright (C) yyyy name of author This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. Also add information on how to contact you by electronic and paper mail. If the program is interactive, make it output a short notice like this when it starts in an interactive mode: Gnomovision version 69, Copyright (C) year name of author Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type 'show w'. This is free software, and you are welcome to redistribute it under certain conditions; type 'show c' for details. The hypothetical commands 'show w' and 'show c' should show the appropriate parts of the General Public License. Of course, the commands you use may be called something other than 'show w' and 'show c'; they could even be mouse-clicks or menu items--whatever suits your program. You should also get your employer (if you work as a programmer) or your school, if any, to sign a "copyright disclaimer" for the program, if necessary. Here is a sample; alter the names: Yoyodyne, Inc., hereby disclaims all copyright interest in the program 'Gnomovision' (which makes passes at compilers) written by James Hacker. signature of Ty Coon, 1 April 1989 Ty Coon, President of Vice This General Public License does not permit incorporating your program into proprietary programs. If your program is a subroutine library, you may consider it more useful to permit linking proprietary applications with the library. If this is what you want to do, use the GNU Library General Public License instead of this License. ================================================================================ To the extent any open source components are licensed under the GPL and/or LGPL, or other similar licenses that require the source code and/or modifications to source code to be made available (as would be noted above), you may obtain a copy of the source code corresponding to the binaries for such open source components and modifications thereto, if any, (the Source Files ), by downloading the Source Files from VMware's website at http://www.vmware.com/download/open_source.html, or by sending a request, with your name and address to: VMware, Inc., 3401 Hillview Avenue, Palo Alto, CA 94304, United States of America or email info@vmware.com. All such requests should clearly specify: OPEN SOURCE FILES REQUEST, Attention General Counsel. VMware shall mail a copy of the Source Files to you on a CD or equivalent physical medium. This offer to obtain a copy of the Source Files is valid for three years from the date you acquired this Software product. ESX_ESXi_4.1/1.20.00.15_100202/1.20.00.15_100202/drivers.xml0000755000000000000000000000106411377515730015546 0ustar vmware-esx-drivers-scsi-arcmsr 400.1.20.00.15.vmk.100202-1.0.4.00000 .rpm/vmware-esx-drivers-scsi-arcmsr-400.1.20.00.15.vmk.100202-1.0.4.00000.x86_64.rpm arcmsr: scsi driver for VMware ESX /usr/lib/vmware/vmkmod/arcmsr.o /etc/vmware/pciid/arcmsr.xml ESX_ESXi_4.1/1.20.00.15_100202/1.20.00.15_100202/offline-bundle0000755000000000000000000000000011611572420016142 5ustar ESX_ESXi_4.1/1.20.00.15_100202/1.20.00.15_100202/offline-bundle/ARC-arcmsr-1.20.00.15.vmk.100202-offline_bundle-262812.zip00007550000000000000000026517 311377515730 0ustar PK}a!}q̍ABB_-7(`7.\Ht#} )$I8l%eR v IN2 =z|JM 1M5sThvg,\dr55\pr:bLƼs}>3boG*U)Ԛ)l ʖ@A6#"+WÇ&EQ,ӫbƥuy:IkIe9m+\DaArf:ybIXl'K;Ї׎b̔B㓜8+]랗aş{c|V).oz:eɧ\k|,7 pS0?WWnS+[zRl͹5-+ܗSMVJ.xcsQikUu[[xQ*s [0 #[=hrOI 7O3k2^\2]NԸA~w|σnJR<xλǛa@@q%'@ܢFOxp*@$u¯Ćs8,+%E*/tTr2W?'{z-"[qGy{ w2l$}t44Cm$}$ǼǺ'6^H;Q(ႀ{ Dm0poݿp+sD ~zO~{x%n61&͝}Zd%4طk`;8;4fV5_W>?j(^2jt~.3盬E"@B!Wy?_TӾ*߆95k} 5Fq,E9]'t_Joj–#!=!HeYaj`v1P6 v*yM(S~胊a?MY3֯~ᲇ/;{DO{A'ysf_RH׵sv-_~rO-E \ݟ걞Q[R ""6# LjB~m4mp%d%)\+z~ENTAEc(8,݃42ó{pj7ƺ L}! ,{W]I;Sq",Ww|^j={+xlF!>ecjDudZhfi-A"Pvc>1S MKl 9U<%aY:Az9ޑ = g/_$h@4ƣnAe48;>HSIE%fz=8Ft{9C?N^W)1|AkH]雌Ũatu_ܙRKO&U'DJ3^L!NRi+ъճjB>A:;D“FƷ+g+}n`~kiҪ}^QKڋG +J`jeib4c"X}"kcw&g6nny6 ޲A%YĂ1dfRmNû>Nj".x8FS޿.!o0XYy-2Q{Q3`#JFcܼu"> IZ,>R7֗dbrj#S6oKPp, 审sW˂FVNv^̖CR_nd4? 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See the # GNU General Public License for more details. # # # Main targets: # all (the default) : make all # clean : clean files # install : make all + install # uninstall : uninstall # # Notes : # - install and uninstall must be made as root ifeq ($(KVER),) ifeq ($(KDIR),) KVER = $(shell uname -r) KDIR := /lib/modules/$(KVER)/build endif else KDIR := /lib/modules/$(KVER)/build endif MODULE_NAME = arcmsr INSTALL_DIR := /lib/modules/$(shell uname -r)/extra arcmsr-objs := arcmsr_attr.o arcmsr_hba.o obj-m := arcmsr.o EXTRA_CFLAGS += -g all: $(MAKE) -C $(KDIR) SUBDIRS=$(shell pwd) BUILD_INI=m install: all $(MAKE) -C $(KDIR) SUBDIRS=$(shell pwd) BUILD_INI=m modules_install -depmod -a $(KVER) uninstall: rm -f $(INSTALL_DIR)/$(MODULE_NAME).ko -/sbin/depmod -a $(KVER) rmmod $(MODULE_NAME) clean: rm -f *.o *.ko .*.cmd *.mod.c .*.d .depend *~ Modules.symvers Module.symvers Module.markers modules.order rm -rf .tmp_versions src/arcmsr.h0000444000031100003110000007611211377577065011504 0ustar mtsmts/* ******************************************************************************* ** O.S : Linux ** FILE NAME : arcmsr.h ** BY : Erich Chen ** Description: SCSI RAID Device Driver for ** ARECA RAID Host adapter ******************************************************************************* ** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved. ** ** Web site: www.areca.com.tw ** E-mail: support@areca.com.tw ** ** This program is free software; you can redistribute it and/or modify ** it under the terms of the GNU General Public License version 2 as ** published by the Free Software Foundation. ** This program is distributed in the hope that it will be useful, ** but WITHOUT ANY WARRANTY; without even the implied warranty of ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ** GNU General Public License for more details. ******************************************************************************* ** Redistribution and use in source and binary forms, with or without ** modification, are permitted provided that the following conditions ** are met: ** 1. Redistributions of source code must retain the above copyright ** notice, this list of conditions and the following disclaimer. ** 2. Redistributions in binary form must reproduce the above copyright ** notice, this list of conditions and the following disclaimer in the ** documentation and/or other materials provided with the distribution. ** 3. The name of the author may not be used to endorse or promote products ** derived from this software without specific prior written permission. ** ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, BUT ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT **(INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ******************************************************************************* */ #include struct device_attribute; /*The limit of outstanding scsi command that firmware can handle*/ #define ARCMSR_MAX_OUTSTANDING_CMD 256 #define ARCMSR_MAX_FREECCB_NUM 320 #define ARCMSR_DRIVER_VERSION "Driver Version 1.20.00.15.vmk.100202" #define ARCMSR_SCSI_INITIATOR_ID 255 #define ARCMSR_MAX_XFER_SECTORS 512 #define ARCMSR_MAX_XFER_SECTORS_B 4096 #define ARCMSR_MAX_XFER_SECTORS_C 304 #define ARCMSR_MAX_TARGETID 17 #define ARCMSR_MAX_TARGETLUN 8 #define ARCMSR_MAX_CMD_PERLUN ARCMSR_MAX_OUTSTANDING_CMD #define ARCMSR_MAX_QBUFFER 4096 #define ARCMSR_DEFAULT_SG_ENTRIES 38 #define ARCMSR_MAX_HBB_POSTQUEUE 264 #define ARCMSR_MAX_XFER_LEN 0x26000 /* 152K */ #define ARCMSR_CDB_SG_PAGE_LENGTH 256 #define SCSI_CMD_ARECA_SPECIFIC 0xE1 /* ********************************************************************************** ** ********************************************************************************** */ #define ARC_SUCCESS 0 #define ARC_FAILURE 1 /* ********************************************************************************** ** ********************************************************************************** */ #if defined(__VMKLNX__) typedef int bool; #ifndef bool #define true 1 #define false 0 #endif #endif /* ********************************************************************************** ** ********************************************************************************** */ #ifndef TRUE #define TRUE 1 #endif #ifndef FALSE #define FALSE 0 #endif /* ********************************************************************************** ** ********************************************************************************** */ #ifndef PCI_VENDOR_ID_ARECA #define PCI_VENDOR_ID_ARECA 0x17d3 /* Vendor ID */ #define PCI_DEVICE_ID_ARECA_1110 0x1110 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1120 0x1120 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1130 0x1130 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1160 0x1160 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1170 0x1170 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1200 0x1200 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1201 0x1201 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1202 0x1202 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1210 0x1210 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1220 0x1220 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1230 0x1230 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1260 0x1260 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1270 0x1270 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1280 0x1280 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1680 0x1680 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1681 0x1681 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1880 0x1880 /* Device ID */ #elif !defined(PCI_DEVICE_ID_ARECA_1200) #define PCI_DEVICE_ID_ARECA_1200 0x1200 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1201 0x1201 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1202 0x1202 /* Device ID */ #endif /* ******************************************************************************* ** split 64bits dma addressing ******************************************************************************* */ #define dma_addr_hi32(addr) (uint32_t) ((addr>>16)>>16) #define dma_addr_lo32(addr) (uint32_t) (addr & 0xffffffff) /* ******************************************************************************* ** MESSAGE CONTROL CODE ******************************************************************************* */ struct CMD_MESSAGE { uint32_t HeaderLength; uint8_t Signature[8]; uint32_t Timeout; uint32_t ControlCode; uint32_t ReturnCode; uint32_t Length; }; /* ******************************************************************************* ** IOP Message Transfer Data for user space ******************************************************************************* */ struct CMD_MESSAGE_FIELD { struct CMD_MESSAGE cmdmessage; uint8_t messagedatabuffer[1032]; }; /* IOP message transfer */ #define ARCMSR_MESSAGE_FAIL 0x0001 /* DeviceType */ #define ARECA_SATA_RAID 0x90000000 /* FunctionCode */ #define FUNCTION_READ_RQBUFFER 0x0801 #define FUNCTION_WRITE_WQBUFFER 0x0802 #define FUNCTION_CLEAR_RQBUFFER 0x0803 #define FUNCTION_CLEAR_WQBUFFER 0x0804 #define FUNCTION_CLEAR_ALLQBUFFER 0x0805 #define FUNCTION_RETURN_CODE_3F 0x0806 #define FUNCTION_SAY_HELLO 0x0807 #define FUNCTION_SAY_GOODBYE 0x0808 #define FUNCTION_FLUSH_ADAPTER_CACHE 0x0809 #define FUNCTION_GET_FIRMWARE_STATUS 0x080A #define FUNCTION_HARDWARE_RESET 0x080B /* ARECA IO CONTROL CODE*/ #define ARCMSR_MESSAGE_READ_RQBUFFER \ ARECA_SATA_RAID | FUNCTION_READ_RQBUFFER #define ARCMSR_MESSAGE_WRITE_WQBUFFER \ ARECA_SATA_RAID | FUNCTION_WRITE_WQBUFFER #define ARCMSR_MESSAGE_CLEAR_RQBUFFER \ ARECA_SATA_RAID | FUNCTION_CLEAR_RQBUFFER #define ARCMSR_MESSAGE_CLEAR_WQBUFFER \ ARECA_SATA_RAID | FUNCTION_CLEAR_WQBUFFER #define ARCMSR_MESSAGE_CLEAR_ALLQBUFFER \ ARECA_SATA_RAID | FUNCTION_CLEAR_ALLQBUFFER #define ARCMSR_MESSAGE_RETURN_CODE_3F \ ARECA_SATA_RAID | FUNCTION_RETURN_CODE_3F #define ARCMSR_MESSAGE_SAY_HELLO \ ARECA_SATA_RAID | FUNCTION_SAY_HELLO #define ARCMSR_MESSAGE_SAY_GOODBYE \ ARECA_SATA_RAID | FUNCTION_SAY_GOODBYE #define ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE \ ARECA_SATA_RAID | FUNCTION_FLUSH_ADAPTER_CACHE /* ARECA IOCTL ReturnCode */ #define ARCMSR_MESSAGE_RETURNCODE_OK 0x00000001 #define ARCMSR_MESSAGE_RETURNCODE_ERROR 0x00000006 #define ARCMSR_MESSAGE_RETURNCODE_3F 0x0000003F #define ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON 0x00000088 /* ************************************************************* ** structure for holding DMA address data ************************************************************* */ #define IS_DMA64 (sizeof(dma_addr_t) == 8) #define IS_SG64_ADDR 0x01000000 /* bit24 */ struct SG32ENTRY { __le32 length; __le32 address; }__attribute__ ((packed)); struct SG64ENTRY { __le32 length; __le32 address; __le32 addresshigh; }__attribute__ ((packed)); /* ******************************************************************** ** Q Buffer of IOP Message Transfer ******************************************************************** */ struct QBUFFER { uint32_t data_len; uint8_t data[124]; }; /* ******************************************************************************* ** FIRMWARE INFO for Intel IOP R 80331 processor (Type A) ******************************************************************************* */ struct FIRMWARE_INFO { uint32_t signature; /*0, 00-03*/ uint32_t request_len; /*1, 04-07*/ uint32_t numbers_queue; /*2, 08-11*/ uint32_t sdram_size; /*3, 12-15*/ uint32_t ide_channels; /*4, 16-19*/ char vendor[40]; /*5, 20-59*/ char model[8]; /*15, 60-67*/ char firmware_ver[16]; /*17, 68-83*/ char device_map[16]; /*21, 84-99*/ uint32_t cfgVersion; /*25,100-103 Added for checking of new firmware capability*/ uint8_t cfgSerial[16]; /*26,104-119*/ uint32_t cfgPicStatus; /*30,120-123*/ }; /* signature of set and get firmware config */ #define ARCMSR_SIGNATURE_GET_CONFIG 0x87974060 #define ARCMSR_SIGNATURE_SET_CONFIG 0x87974063 /* message code of inbound message register */ #define ARCMSR_INBOUND_MESG0_NOP 0x00000000 #define ARCMSR_INBOUND_MESG0_GET_CONFIG 0x00000001 #define ARCMSR_INBOUND_MESG0_SET_CONFIG 0x00000002 #define ARCMSR_INBOUND_MESG0_ABORT_CMD 0x00000003 #define ARCMSR_INBOUND_MESG0_STOP_BGRB 0x00000004 #define ARCMSR_INBOUND_MESG0_FLUSH_CACHE 0x00000005 #define ARCMSR_INBOUND_MESG0_START_BGRB 0x00000006 #define ARCMSR_INBOUND_MESG0_CHK331PENDING 0x00000007 #define ARCMSR_INBOUND_MESG0_SYNC_TIMER 0x00000008 /* doorbell interrupt generator */ #define ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK 0x00000001 #define ARCMSR_INBOUND_DRIVER_DATA_READ_OK 0x00000002 #define ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK 0x00000001 #define ARCMSR_OUTBOUND_IOP331_DATA_READ_OK 0x00000002 /* ccb areca cdb flag */ #define ARCMSR_CCBPOST_FLAG_SGL_BSIZE 0x80000000 #define ARCMSR_CCBPOST_FLAG_IAM_BIOS 0x40000000 #define ARCMSR_CCBREPLY_FLAG_IAM_BIOS 0x40000000 #define ARCMSR_CCBREPLY_FLAG_ERROR_MODE0 0x10000000 #define ARCMSR_CCBREPLY_FLAG_ERROR_MODE1 0x00000001 /* outbound firmware ok */ #define ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK 0x80000000 /* ARC-1680 Bus Reset*/ #define ARCMSR_ARC1680_BUS_RESET 0x00000003 /* ARC-1880 Bus Reset*/ #define ARCMSR_ARC1880_RESET_ADAPTER 0x00000024 #define ARCMSR_ARC1880_DiagWrite_ENABLE 0x00000080 /* ************************************************************************ ** SPEC. for Areca Type B adapter ************************************************************************ */ /* ARECA HBB COMMAND for its FIRMWARE */ /* window of "instruction flags" from driver to iop */ #define ARCMSR_DRV2IOP_DOORBELL 0x00020400 #define ARCMSR_DRV2IOP_DOORBELL_MASK 0x00020404 /* window of "instruction flags" from iop to driver */ #define ARCMSR_IOP2DRV_DOORBELL 0x00020408 #define ARCMSR_IOP2DRV_DOORBELL_MASK 0x0002040C /* ARECA FLAG LANGUAGE */ /* ioctl transfer */ #define ARCMSR_IOP2DRV_DATA_WRITE_OK 0x00000001 /* ioctl transfer */ #define ARCMSR_IOP2DRV_DATA_READ_OK 0x00000002 #define ARCMSR_IOP2DRV_CDB_DONE 0x00000004 #define ARCMSR_IOP2DRV_MESSAGE_CMD_DONE 0x00000008 #define ARCMSR_DOORBELL_HANDLE_INT 0x0000000F #define ARCMSR_DOORBELL_INT_CLEAR_PATTERN 0xFF00FFF0 #define ARCMSR_MESSAGE_INT_CLEAR_PATTERN 0xFF00FFF7 /* (ARCMSR_INBOUND_MESG0_GET_CONFIG<<16)|ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED) */ #define ARCMSR_MESSAGE_GET_CONFIG 0x00010008 /* (ARCMSR_INBOUND_MESG0_SET_CONFIG<<16)|ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED) */ #define ARCMSR_MESSAGE_SET_CONFIG 0x00020008 /* (ARCMSR_INBOUND_MESG0_ABORT_CMD<<16)|ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED) */ #define ARCMSR_MESSAGE_ABORT_CMD 0x00030008 /* (ARCMSR_INBOUND_MESG0_STOP_BGRB<<16)|ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED) */ #define ARCMSR_MESSAGE_STOP_BGRB 0x00040008 /* (ARCMSR_INBOUND_MESG0_FLUSH_CACHE<<16)|ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED) */ #define ARCMSR_MESSAGE_FLUSH_CACHE 0x00050008 /* (ARCMSR_INBOUND_MESG0_START_BGRB<<16)|ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED) */ #define ARCMSR_MESSAGE_START_BGRB 0x00060008 #define ARCMSR_MESSAGE_START_DRIVER_MODE 0x000E0008 #define ARCMSR_MESSAGE_SET_POST_WINDOW 0x000F0008 #define ARCMSR_MESSAGE_ACTIVE_EOI_MODE 0x00100008 /* ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK */ #define ARCMSR_MESSAGE_FIRMWARE_OK 0x80000000 /* ioctl transfer */ #define ARCMSR_DRV2IOP_DATA_WRITE_OK 0x00000001 /* ioctl transfer */ #define ARCMSR_DRV2IOP_DATA_READ_OK 0x00000002 #define ARCMSR_DRV2IOP_CDB_POSTED 0x00000004 #define ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED 0x00000008 #define ARCMSR_DRV2IOP_END_OF_INTERRUPT 0x00000010 /* data tunnel buffer between user space program and its firmware */ /* user space data to iop 128bytes */ #define ARCMSR_MESSAGE_WBUFFER 0x0000fe00 /* iop data to user space 128bytes */ #define ARCMSR_MESSAGE_RBUFFER 0x0000ff00 /* iop message_rwbuffer for message command */ #define ARCMSR_MESSAGE_RWBUFFER 0x0000fa00 /* ************************************************************************ ** SPEC. for Areca HBC adapter ************************************************************************ */ #define ARCMSR_HBC_ISR_THROTTLING_LEVEL 12 #define ARCMSR_HBC_ISR_MAX_DONE_QUEUE 20 /* Host Interrupt Mask */ #define ARCMSR_HBCMU_UTILITY_A_ISR_MASK 0x00000001 /* When clear, the Utility_A interrupt routes to the host.*/ #define ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK 0x00000004 /* When clear, the General Outbound Doorbell interrupt routes to the host.*/ #define ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK 0x00000008 /* When clear, the Outbound Post List FIFO Not Empty interrupt routes to the host.*/ #define ARCMSR_HBCMU_ALL_INTMASKENABLE 0x0000000D /* disable all ISR */ /* Host Interrupt Status */ #define ARCMSR_HBCMU_UTILITY_A_ISR 0x00000001 /* ** Set when the Utility_A Interrupt bit is set in the Outbound Doorbell Register. ** It clears by writing a 1 to the Utility_A bit in the Outbound Doorbell Clear Register or through automatic clearing (if enabled). */ #define ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR 0x00000004 /* ** Set if Outbound Doorbell register bits 30:1 have a non-zero ** value. This bit clears only when Outbound Doorbell bits ** 30:1 are ALL clear. Only a write to the Outbound Doorbell ** Clear register clears bits in the Outbound Doorbell register. */ #define ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR 0x00000008 /* ** Set whenever the Outbound Post List Producer/Consumer ** Register (FIFO) is not empty. It clears when the Outbound ** Post List FIFO is empty. */ #define ARCMSR_HBCMU_SAS_ALL_INT 0x00000010 /* ** This bit indicates a SAS interrupt from a source external to ** the PCIe core. This bit is not maskable. */ /* DoorBell*/ #define ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK 0x00000002 #define ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK 0x00000004 /*inbound message 0 ready*/ #define ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE 0x00000008 /*more than 12 request completed in a time*/ #define ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING 0x00000010 #define ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK 0x00000002 /*outbound DATA WRITE isr door bell clear*/ #define ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_DOORBELL_CLEAR 0x00000002 #define ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK 0x00000004 /*outbound DATA READ isr door bell clear*/ #define ARCMSR_HBCMU_IOP2DRV_DATA_READ_DOORBELL_CLEAR 0x00000004 /*outbound message 0 ready*/ #define ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE 0x00000008 /*outbound message cmd isr door bell clear*/ #define ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR 0x00000008 /*ARCMSR_HBAMU_MESSAGE_FIRMWARE_OK*/ #define ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK 0x80000000 /* ******************************************************************************* ** ARECA SCSI COMMAND DESCRIPTOR BLOCK size 0x1F8 (504) ******************************************************************************* */ struct ARCMSR_CDB { uint8_t Bus; uint8_t TargetID; uint8_t LUN; uint8_t Function; uint8_t CdbLength; uint8_t sgcount; uint8_t Flags; #define ARCMSR_CDB_FLAG_SGL_BSIZE 0x01 #define ARCMSR_CDB_FLAG_BIOS 0x02 #define ARCMSR_CDB_FLAG_WRITE 0x04 #define ARCMSR_CDB_FLAG_SIMPLEQ 0x00 #define ARCMSR_CDB_FLAG_HEADQ 0x08 #define ARCMSR_CDB_FLAG_ORDEREDQ 0x10 uint8_t msgPages; uint32_t Context; uint32_t DataLength; uint8_t Cdb[16]; uint8_t DeviceStatus; #define ARCMSR_DEV_CHECK_CONDITION 0x02 #define ARCMSR_DEV_SELECT_TIMEOUT 0xF0 #define ARCMSR_DEV_ABORTED 0xF1 #define ARCMSR_DEV_INIT_FAIL 0xF2 uint8_t SenseData[15]; union { struct SG32ENTRY sg32entry[1]; struct SG64ENTRY sg64entry[1]; } u; }; /* ******************************************************************************* ** Messaging Unit (MU) of the Intel R 80331 I/O processor(Type A) and Type B processor ******************************************************************************* */ struct MessageUnit_A { uint32_t resrved0[4]; /*0000 000F*/ uint32_t inbound_msgaddr0; /*0010 0013*/ uint32_t inbound_msgaddr1; /*0014 0017*/ uint32_t outbound_msgaddr0; /*0018 001B*/ uint32_t outbound_msgaddr1; /*001C 001F*/ uint32_t inbound_doorbell; /*0020 0023*/ uint32_t inbound_intstatus; /*0024 0027*/ uint32_t inbound_intmask; /*0028 002B*/ uint32_t outbound_doorbell; /*002C 002F*/ uint32_t outbound_intstatus; /*0030 0033*/ uint32_t outbound_intmask; /*0034 0037*/ uint32_t reserved1[2]; /*0038 003F*/ uint32_t inbound_queueport; /*0040 0043*/ uint32_t outbound_queueport; /*0044 0047*/ uint32_t reserved2[2]; /*0048 004F*/ uint32_t reserved3[492]; /*0050 07FF 492*/ uint32_t reserved4[128]; /*0800 09FF 128*/ uint32_t message_rwbuffer[256]; /*0a00 0DFF 256*/ uint32_t message_wbuffer[32]; /*0E00 0E7F 32*/ uint32_t reserved5[32]; /*0E80 0EFF 32*/ uint32_t message_rbuffer[32]; /*0F00 0F7F 32*/ uint32_t reserved6[32]; /*0F80 0FFF 32*/ }; struct MessageUnit_B { uint32_t post_qbuffer[ARCMSR_MAX_HBB_POSTQUEUE]; uint32_t done_qbuffer[ARCMSR_MAX_HBB_POSTQUEUE]; uint32_t postq_index; uint32_t doneq_index; uint32_t __iomem *drv2iop_doorbell; uint32_t __iomem *drv2iop_doorbell_mask; uint32_t __iomem *iop2drv_doorbell; uint32_t __iomem *iop2drv_doorbell_mask; uint32_t __iomem *message_rwbuffer; uint32_t __iomem *message_wbuffer; uint32_t __iomem *message_rbuffer; }; /* ********************************************************************* ** LSI ********************************************************************* */ struct MessageUnit_C { uint32_t message_unit_status; /*0000 0003*/ uint32_t slave_error_attribute; /*0004 0007*/ uint32_t slave_error_address; /*0008 000B*/ uint32_t posted_outbound_doorbell; /*000C 000F*/ uint32_t master_error_attribute; /*0010 0013*/ uint32_t master_error_address_low; /*0014 0017*/ uint32_t master_error_address_high; /*0018 001B*/ uint32_t hcb_size; /*001C 001F*/ uint32_t inbound_doorbell; /*0020 0023*/ uint32_t diagnostic_rw_data; /*0024 0027*/ uint32_t diagnostic_rw_address_low; /*0028 002B*/ uint32_t diagnostic_rw_address_high; /*002C 002F*/ uint32_t host_int_status; /*0030 0033*/ uint32_t host_int_mask; /*0034 0037*/ uint32_t dcr_data; /*0038 003B*/ uint32_t dcr_address; /*003C 003F*/ uint32_t inbound_queueport; /*0040 0043*/ uint32_t outbound_queueport; /*0044 0047*/ uint32_t hcb_pci_address_low; /*0048 004B*/ uint32_t hcb_pci_address_high; /*004C 004F*/ uint32_t iop_int_status; /*0050 0053*/ uint32_t iop_int_mask; /*0054 0057*/ uint32_t iop_inbound_queue_port; /*0058 005B*/ uint32_t iop_outbound_queue_port; /*005C 005F*/ uint32_t inbound_free_list_index; /*0060 0063*/ uint32_t inbound_post_list_index; /*0064 0067*/ uint32_t outbound_free_list_index; /*0068 006B*/ uint32_t outbound_post_list_index; /*006C 006F*/ uint32_t inbound_doorbell_clear; /*0070 0073*/ uint32_t i2o_message_unit_control; /*0074 0077*/ uint32_t last_used_message_source_address_low; /*0078 007B*/ uint32_t last_used_message_source_address_high; /*007C 007F*/ uint32_t pull_mode_data_byte_count[4]; /*0080 008F*/ uint32_t message_dest_address_index; /*0090 0093*/ uint32_t done_queue_not_empty_int_counter_timer; /*0094 0097*/ uint32_t utility_A_int_counter_timer; /*0098 009B*/ uint32_t outbound_doorbell; /*009C 009F*/ uint32_t outbound_doorbell_clear; /*00A0 00A3*/ uint32_t message_source_address_index; /*00A4 00A7*/ uint32_t message_done_queue_index; /*00A8 00AB*/ uint32_t reserved0; /*00AC 00AF*/ uint32_t inbound_msgaddr0; /*00B0 00B3*/ uint32_t inbound_msgaddr1; /*00B4 00B7*/ uint32_t outbound_msgaddr0; /*00B8 00BB*/ uint32_t outbound_msgaddr1; /*00BC 00BF*/ uint32_t inbound_queueport_low; /*00C0 00C3*/ uint32_t inbound_queueport_high; /*00C4 00C7*/ uint32_t outbound_queueport_low; /*00C8 00CB*/ uint32_t outbound_queueport_high; /*00CC 00CF*/ uint32_t iop_inbound_queue_port_low; /*00D0 00D3*/ uint32_t iop_inbound_queue_port_high; /*00D4 00D7*/ uint32_t iop_outbound_queue_port_low; /*00D8 00DB*/ uint32_t iop_outbound_queue_port_high; /*00DC 00DF*/ uint32_t message_dest_queue_port_low; /*00E0 00E3*/ uint32_t message_dest_queue_port_high; /*00E4 00E7*/ uint32_t last_used_message_dest_address_low; /*00E8 00EB*/ uint32_t last_used_message_dest_address_high; /*00EC 00EF*/ uint32_t message_done_queue_base_address_low; /*00F0 00F3*/ uint32_t message_done_queue_base_address_high; /*00F4 00F7*/ uint32_t host_diagnostic; /*00F8 00FB*/ uint32_t write_sequence; /*00FC 00FF*/ uint32_t reserved1[34]; /*0100 0187*/ uint32_t reserved2[1950]; /*0188 1FFF*/ uint32_t message_wbuffer[32]; /*2000 207F*/ uint32_t reserved3[32]; /*2080 20FF*/ uint32_t message_rbuffer[32]; /*2100 217F*/ uint32_t reserved4[32]; /*2180 21FF*/ uint32_t msgcode_rwbuffer[256]; /*2200 23FF*/ }; /* ******************************************************************************* ** Adapter Control Block ******************************************************************************* */ struct AdapterControlBlock { uint32_t adapter_type; /* adapter A,B..... */ #define ACB_ADAPTER_TYPE_A 0x00000001 /* hba I IOP */ #define ACB_ADAPTER_TYPE_B 0x00000002 /* hbb M IOP */ #define ACB_ADAPTER_TYPE_C 0x00000004 /* hbc P IOP */ #define ACB_ADAPTER_TYPE_D 0x00000008 /* hbd A IOP */ struct pci_dev * pdev; struct Scsi_Host * host; unsigned long vir2phy_offset; /* Offset is used in making arc cdb physical to virtual calculations */ uint32_t outbound_int_enable; uint32_t cdb_phyaddr_hi32; spinlock_t eh_lock; spinlock_t ccblist_lock; union { struct MessageUnit_A __iomem *pmuA; struct MessageUnit_B *pmuB; struct MessageUnit_C __iomem *pmuC; }; /* message unit ATU inbound base address0 */ void __iomem *mem_base0; void __iomem *mem_base1; uint32_t acb_flags; u16 dev_id; uint8_t adapter_index; #define ACB_F_SCSISTOPADAPTER 0x0001 #define ACB_F_MSG_STOP_BGRB 0x0002 /* stop RAID background rebuild */ #define ACB_F_MSG_START_BGRB 0x0004 /* stop RAID background rebuild */ #define ACB_F_IOPDATA_OVERFLOW 0x0008 /* iop message data rqbuffer overflow */ #define ACB_F_MESSAGE_WQBUFFER_CLEARED 0x0010 /* message clear wqbuffer */ #define ACB_F_MESSAGE_RQBUFFER_CLEARED 0x0020 /* message clear rqbuffer */ #define ACB_F_MESSAGE_WQBUFFER_READED 0x0040 #define ACB_F_BUS_RESET 0x0080 #define ACB_F_BUS_HANG_ON 0x0800/* need hardware reset bus */ #define ACB_F_IOP_INITED 0x0100 /* iop init */ #define ACB_F_ABORT 0x0200 #define ACB_F_FIRMWARE_TRAP 0x0400 struct CommandControlBlock * pccb_pool[ARCMSR_MAX_FREECCB_NUM]; /* used for memory free */ struct list_head ccb_free_list; /* head of free ccb list */ atomic_t ccboutstandingcount; /*The present outstanding command number that in the IOP that waiting for being handled by FW*/ void * dma_coherent; /* dma_coherent used for memory free */ dma_addr_t dma_coherent_handle; /* dma_coherent_handle used for memory free */ dma_addr_t dma_coherent_handle_hbb_mu; unsigned int uncache_size; uint8_t rqbuffer[ARCMSR_MAX_QBUFFER]; /* data collection buffer for read from 80331 */ int32_t rqbuf_firstindex; /* first of read buffer */ int32_t rqbuf_lastindex; /* last of read buffer */ uint8_t wqbuffer[ARCMSR_MAX_QBUFFER]; /* data collection buffer for write to 80331 */ int32_t wqbuf_firstindex; /* first of write buffer */ int32_t wqbuf_lastindex; /* last of write buffer */ uint8_t devstate[ARCMSR_MAX_TARGETID][ARCMSR_MAX_TARGETLUN]; /* id0 ..... id15, lun0...lun7 */ #define ARECA_RAID_GONE 0x55 #define ARECA_RAID_GOOD 0xaa uint32_t num_resets; uint32_t num_aborts; uint32_t signature; uint32_t firm_request_len; uint32_t firm_numbers_queue; uint32_t firm_sdram_size; uint32_t firm_hd_channels; uint32_t firm_cfg_version; char firm_model[12]; char firm_version[20]; char device_map[20]; /*21,84-99*/ struct work_struct arcmsr_do_message_isr_bh; struct timer_list eternal_timer; unsigned short fw_flag; #define FW_NORMAL 0x0000 #define FW_BOG 0x0001 #define FW_DEADLOCK 0x0010 atomic_t rq_map_token; atomic_t ante_token_value; };/* HW_DEVICE_EXTENSION */ /* ******************************************************************************* ** Command Control Block ** this CCB length must be 32 bytes boundary ******************************************************************************* */ struct CommandControlBlock { /*x32:sizeof struct_CCB=(32+60)byte, x64:sizeof struct_CCB=(64+60)byte*/ struct list_head list; /*x32: 8byte, x64: 16byte*/ struct scsi_cmnd *pcmd; /*8 bytes pointer of linux scsi command */ struct AdapterControlBlock *acb; /*x32: 4byte, x64: 8byte*/ uint32_t cdb_phyaddr_pattern; /*x32: 4byte, x64: 4byte*/ uint32_t arc_cdb_size; /*x32:4byte,x64:4byte*/ uint16_t ccb_flags; /*x32: 2byte, x64: 2byte*/ #define CCB_FLAG_READ 0x0000 #define CCB_FLAG_WRITE 0x0001 #define CCB_FLAG_ERROR 0x0002 #define CCB_FLAG_FLUSHCACHE 0x0004 #define CCB_FLAG_MASTER_ABORTED 0x0008 uint16_t startdone; /*x32:2byte,x32:2byte*/ #define ARCMSR_CCB_DONE 0x0000 #define ARCMSR_CCB_START 0x55AA #define ARCMSR_CCB_ABORTED 0xAA55 #define ARCMSR_CCB_ILLEGAL 0xFFFF #if BITS_PER_LONG == 64 /* ======================512+64 bytes======================== */ uint32_t reserved[5]; /*24 byte*/ #else /* ======================512+32 bytes======================== */ uint32_t reserved; /*8 byte*/ #endif /* ======================================================= */ struct ARCMSR_CDB arcmsr_cdb; }; /* ******************************************************************************* ** ARECA SCSI sense data ******************************************************************************* */ struct SENSE_DATA { uint8_t ErrorCode:7; #define SCSI_SENSE_CURRENT_ERRORS 0x70 #define SCSI_SENSE_DEFERRED_ERRORS 0x71 uint8_t Valid:1; uint8_t SegmentNumber; uint8_t SenseKey:4; uint8_t Reserved:1; uint8_t IncorrectLength:1; uint8_t EndOfMedia:1; uint8_t FileMark:1; uint8_t Information[4]; uint8_t AdditionalSenseLength; uint8_t CommandSpecificInformation[4]; uint8_t AdditionalSenseCode; uint8_t AdditionalSenseCodeQualifier; uint8_t FieldReplaceableUnitCode; uint8_t SenseKeySpecific[3]; }; /* ******************************************************************************* ** Outbound Interrupt Status Register - OISR ******************************************************************************* */ #define ARCMSR_MU_OUTBOUND_INTERRUPT_STATUS_REG 0x30 #define ARCMSR_MU_OUTBOUND_PCI_INT 0x10 #define ARCMSR_MU_OUTBOUND_POSTQUEUE_INT 0x08 #define ARCMSR_MU_OUTBOUND_DOORBELL_INT 0x04 #define ARCMSR_MU_OUTBOUND_MESSAGE1_INT 0x02 #define ARCMSR_MU_OUTBOUND_MESSAGE0_INT 0x01 #define ARCMSR_MU_OUTBOUND_HANDLE_INT \ (ARCMSR_MU_OUTBOUND_MESSAGE0_INT \ |ARCMSR_MU_OUTBOUND_MESSAGE1_INT \ |ARCMSR_MU_OUTBOUND_DOORBELL_INT \ |ARCMSR_MU_OUTBOUND_POSTQUEUE_INT \ |ARCMSR_MU_OUTBOUND_PCI_INT) /* ******************************************************************************* ** Outbound Interrupt Mask Register - OIMR ******************************************************************************* */ #define ARCMSR_MU_OUTBOUND_INTERRUPT_MASK_REG 0x34 #define ARCMSR_MU_OUTBOUND_PCI_INTMASKENABLE 0x10 #define ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE 0x08 #define ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE 0x04 #define ARCMSR_MU_OUTBOUND_MESSAGE1_INTMASKENABLE 0x02 #define ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE 0x01 #define ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE 0x1F extern void arcmsr_post_ioctldata2iop(struct AdapterControlBlock *); extern void arcmsr_iop_message_read(struct AdapterControlBlock *); extern struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *); extern struct device_attribute *arcmsr_host_attrs[]; extern int arcmsr_alloc_sysfs_attr(struct AdapterControlBlock *); void arcmsr_free_sysfs_attr(struct AdapterControlBlock *acb); src/arcmsr_attr.c0000444000031100003110000003134111377577065012524 0ustar mtsmts/* ******************************************************************************* ** O.S : Linux ** FILE NAME : arcmsr_attr.c ** BY : Erich Chen ** Description: attributes exported to sysfs and device host ******************************************************************************* ** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved ** ** Web site: www.areca.com.tw ** E-mail: support@areca.com.tw ** ** This program is free software; you can redistribute it and/or modify ** it under the terms of the GNU General Public License version 2 as ** published by the Free Software Foundation. ** This program is distributed in the hope that it will be useful, ** but WITHOUT ANY WARRANTY; without even the implied warranty of ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ** GNU General Public License for more details. ******************************************************************************* ** Redistribution and use in source and binary forms, with or without ** modification, are permitted provided that the following conditions ** are met: ** 1. Redistributions of source code must retain the above copyright ** notice, this list of conditions and the following disclaimer. ** 2. Redistributions in binary form must reproduce the above copyright ** notice, this list of conditions and the following disclaimer in the ** documentation and/or other materials provided with the distribution. ** 3. The name of the author may not be used to endorse or promote products ** derived from this software without specific prior written permission. ** ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ******************************************************************************* ** For history of changes, see Documentation/scsi/ChangeLog.arcmsr ** Firmware Specification, see Documentation/scsi/arcmsr_spec.txt ******************************************************************************* */ #include #include #include #include #include #include #include #include #include #include #include "arcmsr.h" struct device_attribute *arcmsr_host_attrs[]; static ssize_t arcmsr_sysfs_iop_message_read(struct kobject *kobj, struct bin_attribute *bin, char *buf, loff_t off, size_t count) { struct device *dev = container_of(kobj,struct device,kobj); struct Scsi_Host *host = class_to_shost(dev); struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; uint8_t *pQbuffer,*ptmpQbuffer; int32_t allxfer_len = 0; if (!capable(CAP_SYS_ADMIN)) return -EACCES; /* do message unit read. */ ptmpQbuffer = (uint8_t *)buf; while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex) && (allxfer_len < 1031)) { pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex]; memcpy(ptmpQbuffer, pQbuffer, 1); acb->rqbuf_firstindex++; acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER; ptmpQbuffer++; allxfer_len++; } if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { struct QBUFFER __iomem *prbuffer; uint8_t __iomem *iop_data; int32_t iop_len; acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; prbuffer = arcmsr_get_iop_rqbuffer(acb); iop_data = prbuffer->data; iop_len = readl(&prbuffer->data_len); while (iop_len > 0) { acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data); acb->rqbuf_lastindex++; acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER; iop_data++; iop_len--; } arcmsr_iop_message_read(acb); } return (allxfer_len); } static ssize_t arcmsr_sysfs_iop_message_write(struct kobject *kobj, struct bin_attribute *bin, char *buf, loff_t off, size_t count) { struct device *dev = container_of(kobj,struct device,kobj); struct Scsi_Host *host = class_to_shost(dev); struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex; uint8_t *pQbuffer, *ptmpuserbuffer; if (!capable(CAP_SYS_ADMIN)) return -EACCES; if (count > 1032) return -EINVAL; /* do message unit write. */ ptmpuserbuffer = (uint8_t *)buf; user_len = (int32_t)count; wqbuf_lastindex = acb->wqbuf_lastindex; wqbuf_firstindex = acb->wqbuf_firstindex; if (wqbuf_lastindex != wqbuf_firstindex) { arcmsr_post_ioctldata2iop(acb); return 0; /*need retry*/ } else { my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1) &(ARCMSR_MAX_QBUFFER - 1); if (my_empty_len >= user_len) { while (user_len > 0) { pQbuffer = &acb->wqbuffer[acb->wqbuf_lastindex]; memcpy(pQbuffer, ptmpuserbuffer, 1); acb->wqbuf_lastindex++; acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER; ptmpuserbuffer++; user_len--; } if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) { acb->acb_flags &= ~ACB_F_MESSAGE_WQBUFFER_CLEARED; arcmsr_post_ioctldata2iop(acb); } return count; } else { return 0; /*need retry*/ } } } static ssize_t arcmsr_sysfs_iop_message_clear(struct kobject *kobj, struct bin_attribute *bin, char *buf, loff_t off, size_t count) { struct device *dev = container_of(kobj,struct device,kobj); struct Scsi_Host *host = class_to_shost(dev); struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; uint8_t *pQbuffer; if (!capable(CAP_SYS_ADMIN)) return -EACCES; if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; arcmsr_iop_message_read(acb); } acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED | ACB_F_MESSAGE_RQBUFFER_CLEARED | ACB_F_MESSAGE_WQBUFFER_READED); acb->rqbuf_firstindex = 0; acb->rqbuf_lastindex = 0; acb->wqbuf_firstindex = 0; acb->wqbuf_lastindex = 0; pQbuffer = acb->rqbuffer; memset(pQbuffer, 0, sizeof (struct QBUFFER)); pQbuffer = acb->wqbuffer; memset(pQbuffer, 0, sizeof (struct QBUFFER)); return 1; } static struct bin_attribute arcmsr_sysfs_message_read_attr = { .attr = { .name = "mu_read", .mode = S_IRUSR , .owner = THIS_MODULE, }, .size = 1032, .read = arcmsr_sysfs_iop_message_read, }; static struct bin_attribute arcmsr_sysfs_message_write_attr = { .attr = { .name = "mu_write", .mode = S_IWUSR, .owner = THIS_MODULE, }, .size = 1032, .write = arcmsr_sysfs_iop_message_write, }; static struct bin_attribute arcmsr_sysfs_message_clear_attr = { .attr = { .name = "mu_clear", .mode = S_IWUSR, .owner = THIS_MODULE, }, .size = 1, .write = arcmsr_sysfs_iop_message_clear, }; int arcmsr_alloc_sysfs_attr(struct AdapterControlBlock *acb) { struct Scsi_Host *host = acb->host; int error; error = sysfs_create_bin_file(&host->shost_dev.kobj, &arcmsr_sysfs_message_read_attr); if (error) { printk(KERN_ERR "arcmsr: alloc sysfs mu_read failed\n"); goto error_bin_file_message_read; } error = sysfs_create_bin_file(&host->shost_dev.kobj, &arcmsr_sysfs_message_write_attr); if (error) { printk(KERN_ERR "arcmsr: alloc sysfs mu_write failed\n"); goto error_bin_file_message_write; } error = sysfs_create_bin_file(&host->shost_dev.kobj, &arcmsr_sysfs_message_clear_attr); if (error) { printk(KERN_ERR "arcmsr: alloc sysfs mu_clear failed\n"); goto error_bin_file_message_clear; } return 0; error_bin_file_message_clear: sysfs_remove_bin_file(&host->shost_dev.kobj, &arcmsr_sysfs_message_write_attr); error_bin_file_message_write: sysfs_remove_bin_file(&host->shost_dev.kobj, &arcmsr_sysfs_message_read_attr); error_bin_file_message_read: return error; } void arcmsr_free_sysfs_attr(struct AdapterControlBlock *acb) { struct Scsi_Host *host = acb->host; sysfs_remove_bin_file(&host->shost_dev.kobj, &arcmsr_sysfs_message_clear_attr); sysfs_remove_bin_file(&host->shost_dev.kobj, &arcmsr_sysfs_message_write_attr); sysfs_remove_bin_file(&host->shost_dev.kobj, &arcmsr_sysfs_message_read_attr); } static ssize_t arcmsr_attr_host_driver_version(struct device *dev, struct device_attribute *attr, char *buf) { return snprintf(buf, PAGE_SIZE, "%s\n", ARCMSR_DRIVER_VERSION); } static ssize_t arcmsr_attr_host_driver_posted_cmd(struct device *dev, struct device_attribute *attr, char *buf) { struct Scsi_Host *host = class_to_shost(dev); struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; return snprintf(buf, PAGE_SIZE, "%4d\n", atomic_read(&acb->ccboutstandingcount)); } static ssize_t arcmsr_attr_host_driver_reset(struct device *dev, struct device_attribute *attr, char *buf) { struct Scsi_Host *host = class_to_shost(dev); struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; return snprintf(buf, PAGE_SIZE, "%4d\n", acb->num_resets); } static ssize_t arcmsr_attr_host_driver_abort(struct device *dev, struct device_attribute *attr, char *buf) { struct Scsi_Host *host = class_to_shost(dev); struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; return snprintf(buf, PAGE_SIZE, "%4d\n", acb->num_aborts); } static ssize_t arcmsr_attr_host_fw_model(struct device *dev, struct device_attribute *attr, char *buf) { struct Scsi_Host *host = class_to_shost(dev); struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; return snprintf(buf, PAGE_SIZE, "%s\n", acb->firm_model); } static ssize_t arcmsr_attr_host_fw_version(struct device *dev, struct device_attribute *attr, char *buf) { struct Scsi_Host *host = class_to_shost(dev); struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; return snprintf(buf, PAGE_SIZE, "%s\n", acb->firm_version); } static ssize_t arcmsr_attr_host_fw_request_len(struct device *dev, struct device_attribute *attr, char *buf) { struct Scsi_Host *host = class_to_shost(dev); struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; return snprintf(buf, PAGE_SIZE, "%4d\n", acb->firm_request_len); } static ssize_t arcmsr_attr_host_fw_numbers_queue(struct device *dev, struct device_attribute *attr, char *buf) { struct Scsi_Host *host = class_to_shost(dev); struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; return snprintf(buf, PAGE_SIZE, "%4d\n", acb->firm_numbers_queue); } static ssize_t arcmsr_attr_host_fw_sdram_size(struct device *dev, struct device_attribute *attr, char *buf) { struct Scsi_Host *host = class_to_shost(dev); struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; return snprintf(buf, PAGE_SIZE, "%4d\n", acb->firm_sdram_size); } static ssize_t arcmsr_attr_host_fw_hd_channels(struct device *dev, struct device_attribute *attr, char *buf) { struct Scsi_Host *host = class_to_shost(dev); struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; return snprintf(buf, PAGE_SIZE, "%4d\n", acb->firm_hd_channels); } static DEVICE_ATTR(host_driver_version, S_IRUGO, arcmsr_attr_host_driver_version, NULL); static DEVICE_ATTR(host_driver_posted_cmd, S_IRUGO, arcmsr_attr_host_driver_posted_cmd, NULL); static DEVICE_ATTR(host_driver_reset, S_IRUGO, arcmsr_attr_host_driver_reset, NULL); static DEVICE_ATTR(host_driver_abort, S_IRUGO, arcmsr_attr_host_driver_abort, NULL); static DEVICE_ATTR(host_fw_model, S_IRUGO, arcmsr_attr_host_fw_model, NULL); static DEVICE_ATTR(host_fw_version, S_IRUGO, arcmsr_attr_host_fw_version, NULL); static DEVICE_ATTR(host_fw_request_len, S_IRUGO, arcmsr_attr_host_fw_request_len, NULL); static DEVICE_ATTR(host_fw_numbers_queue, S_IRUGO, arcmsr_attr_host_fw_numbers_queue, NULL); static DEVICE_ATTR(host_fw_sdram_size, S_IRUGO, arcmsr_attr_host_fw_sdram_size, NULL); static DEVICE_ATTR(host_fw_hd_channels, S_IRUGO, arcmsr_attr_host_fw_hd_channels, NULL); struct device_attribute *arcmsr_host_attrs[] = { &dev_attr_host_driver_version, &dev_attr_host_driver_posted_cmd, &dev_attr_host_driver_reset, &dev_attr_host_driver_abort, &dev_attr_host_fw_model, &dev_attr_host_fw_version, &dev_attr_host_fw_request_len, &dev_attr_host_fw_numbers_queue, &dev_attr_host_fw_sdram_size, &dev_attr_host_fw_hd_channels, NULL, }; src/arcmsr_hba.c0000444000031100003110000030154111377577065012306 0ustar mtsmts/* ******************************************************************************* ** O.S : Linux ** FILE NAME : arcmsr_hba.c ** BY : Erich Chen ** Description: SCSI RAID Device Driver for ** ARECA RAID Host adapter ******************************************************************************* ** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved ** ** Web site: www.areca.com.tw ** E-mail: support@areca.com.tw ** ** This program is free software; you can redistribute it and/or modify ** it under the terms of the GNU General Public License version 2 as ** published by the Free Software Foundation. ** This program is distributed in the hope that it will be useful, ** but WITHOUT ANY WARRANTY; without even the implied warranty of ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ** GNU General Public License for more details. ******************************************************************************* ** Redistribution and use in source and binary forms, with or without ** modification, are permitted provided that the following conditions ** are met: ** 1. Redistributions of source code must retain the above copyright ** notice, this list of conditions and the following disclaimer. ** 2. Redistributions in binary form must reproduce the above copyright ** notice, this list of conditions and the following disclaimer in the ** documentation and/or other materials provided with the distribution. ** 3. The name of the author may not be used to endorse or promote products ** derived from this software without specific prior written permission. ** ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ******************************************************************************* ** For history of changes, see Documentation/scsi/ChangeLog.arcmsr ** Firmware Specification, see Documentation/scsi/arcmsr_spec.txt ******************************************************************************* */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "arcmsr.h" MODULE_AUTHOR("Nick Cheng "); MODULE_DESCRIPTION("ARECA (ARC11xx/12xx/16xx/1880) SATA/SAS RAID Host Bus Adapter"); MODULE_LICENSE("Dual BSD/GPL"); MODULE_VERSION(ARCMSR_DRIVER_VERSION); #define ARCMSR_FW_POLLING 0 static int sleeptime = 10; static int retrycount = 30; wait_queue_head_t wait_q; static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, struct scsi_cmnd *cmd); static int arcmsr_iop_confirm(struct AdapterControlBlock *acb); static int arcmsr_abort(struct scsi_cmnd *); static int arcmsr_device_reset(struct scsi_cmnd *cmd); static int arcmsr_bus_reset(struct scsi_cmnd *); static int arcmsr_bios_param(struct scsi_device *sdev, struct block_device *bdev, sector_t capacity, int *info); static int arcmsr_queue_command(struct scsi_cmnd *cmd, void (*done) (struct scsi_cmnd *)); static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id); static void arcmsr_remove(struct pci_dev *pdev); static void arcmsr_shutdown(struct pci_dev *pdev); static void arcmsr_iop_init(struct AdapterControlBlock *acb); static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb); static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb); static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb); static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb); static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb); static void arcmsr_request_device_map(unsigned long pacb); static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb); static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb); static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb); static void arcmsr_message_isr_bh_fn(void *pacb); static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb); static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb); static void arcmsr_hbc_message_isr(struct AdapterControlBlock *pACB); static void arcmsr_hardware_reset(struct AdapterControlBlock *acb); static const char *arcmsr_info(struct Scsi_Host *); static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb); static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev, int queue_depth) { if (queue_depth > ARCMSR_MAX_CMD_PERLUN) queue_depth = ARCMSR_MAX_CMD_PERLUN; scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, queue_depth); return queue_depth; } static struct scsi_host_template arcmsr_scsi_host_template = { .module = THIS_MODULE, .name = "ARCMSR ARECA SATA/SAS RAID Controller" ARCMSR_DRIVER_VERSION, .info = arcmsr_info, .queuecommand = arcmsr_queue_command, .eh_abort_handler = arcmsr_abort, .eh_device_reset_handler = arcmsr_device_reset, .eh_bus_reset_handler = arcmsr_bus_reset, .bios_param = arcmsr_bios_param, .change_queue_depth = arcmsr_adjust_disk_queue_depth, .can_queue = ARCMSR_MAX_FREECCB_NUM, .this_id = ARCMSR_SCSI_INITIATOR_ID, .sg_tablesize = ARCMSR_DEFAULT_SG_ENTRIES, .max_sectors = ARCMSR_MAX_XFER_SECTORS_C, .cmd_per_lun = ARCMSR_MAX_CMD_PERLUN, .use_clustering = ENABLE_CLUSTERING, //.shost_attrs = arcmsr_host_attrs, }; #ifdef CONFIG_SCSI_ARCMSR_AER static pci_ers_result_t arcmsr_pci_slot_reset(struct pci_dev *pdev); static pci_ers_result_t arcmsr_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state); static struct pci_error_handlers arcmsr_pci_error_handlers = { .error_detected = arcmsr_pci_error_detected, .slot_reset = arcmsr_pci_slot_reset, }; #endif static struct pci_device_id arcmsr_device_id_table[] = { {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880)}, {0, 0}, /* Terminating entry */ }; MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table); static struct pci_driver arcmsr_pci_driver = { .name = "arcmsr", .id_table = arcmsr_device_id_table, .probe = arcmsr_probe, .remove = arcmsr_remove, .shutdown = arcmsr_shutdown, #ifdef CONFIG_SCSI_ARCMSR_AER .err_handler = &arcmsr_pci_error_handlers, #endif }; /* **************************************************************************** **************************************************************************** */ int arcmsr_sleep_for_bus_reset(struct scsi_cmnd *cmd) { struct Scsi_Host *shost = NULL; int i, isleep; shost = cmd->device->host; isleep = sleeptime / 10; if (isleep > 0) { for (i = 0; i < isleep; i ++) { msleep(10000); } } isleep = sleeptime % 10; if (isleep > 0) { msleep(isleep*1000); } printk("wake-up\n"); return 0; } static void arcmsr_free_hbb_mu(struct AdapterControlBlock *acb) { switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: case ACB_ADAPTER_TYPE_C: break; case ACB_ADAPTER_TYPE_B:{ dma_free_coherent(&acb->pdev->dev, sizeof(struct MessageUnit_B), acb->pmuB, acb->dma_coherent_handle_hbb_mu); } } } static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb) { struct pci_dev *pdev = acb->pdev; switch (acb->adapter_type){ case ACB_ADAPTER_TYPE_A:{ acb->pmuA = ioremap(pci_resource_start(pdev,0), pci_resource_len(pdev,0)); if (!acb->pmuA) { printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); return false; } break; } case ACB_ADAPTER_TYPE_B:{ void __iomem *mem_base0, *mem_base1; mem_base0 = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); if (!mem_base0) { printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); return false; } mem_base1 = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2)); if (!mem_base1) { iounmap(mem_base0); printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); return false; } acb->mem_base0 = mem_base0; acb->mem_base1 = mem_base1; break; } case ACB_ADAPTER_TYPE_C:{ acb->pmuC = ioremap_nocache(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1)); if (!acb->pmuC){ printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); return false; } if(readl(&acb->pmuC->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE){ writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR,&acb->pmuC->outbound_doorbell_clear);/*clear interrupt*/ return TRUE; } break; } } return true; } static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb) { switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A:{ iounmap(acb->pmuA); } break; case ACB_ADAPTER_TYPE_B:{ iounmap(acb->mem_base0); iounmap(acb->mem_base1); } break; case ACB_ADAPTER_TYPE_C:{ iounmap(acb->pmuC); } } } static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id) { irqreturn_t handle_state; struct AdapterControlBlock *acb = dev_id; handle_state = arcmsr_interrupt(acb); return handle_state; } static int arcmsr_bios_param(struct scsi_device *sdev, struct block_device *bdev, sector_t capacity, int *geom) { int ret, heads, sectors, cylinders, total_capacity; unsigned char *buffer;/* return copy of block device's partition table */ buffer = scsi_bios_ptable(bdev); if (buffer) { ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]); kfree(buffer); if (ret != -1) return ret; } total_capacity = capacity; heads = 64; sectors = 32; cylinders = total_capacity / (heads * sectors); if (cylinders > 1024) { heads = 255; sectors = 63; cylinders = total_capacity / (heads * sectors); } geom[0] = heads; geom[1] = sectors; geom[2] = cylinders; return 0; } static void arcmsr_define_adapter_type(struct AdapterControlBlock *acb) { struct pci_dev *pdev = acb->pdev; u16 dev_id; pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id); acb->dev_id = dev_id; switch (dev_id) { case 0x1880 : { acb->adapter_type = ACB_ADAPTER_TYPE_C; } break; case 0x1201 : { acb->adapter_type = ACB_ADAPTER_TYPE_B; } break; default : acb->adapter_type = ACB_ADAPTER_TYPE_A; } } static uint8_t arcmsr_hba_wait_msgint_ready(struct AdapterControlBlock *acb) { struct MessageUnit_A __iomem *reg = acb->pmuA; uint32_t Index; uint8_t Retries = 0x00; do { for (Index = 0; Index < 100; Index++) { if (readl(®->outbound_intstatus) & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) { writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, ®->outbound_intstatus); return TRUE; } msleep(10); }/*max 1 seconds*/ } while (Retries++ < 20);/*max 20 sec*/ return FALSE; } static uint8_t arcmsr_hbb_wait_msgint_ready(struct AdapterControlBlock *acb) { struct MessageUnit_B *reg = acb->pmuB; uint32_t Index; uint8_t Retries = 0x00; do { for (Index = 0; Index < 100; Index++) { if (readl(reg->iop2drv_doorbell) & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) { writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN , reg->iop2drv_doorbell); writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell); return TRUE; } msleep(10); }/*max 1 seconds*/ } while (Retries++ < 20);/*max 20 sec*/ return FALSE; } static uint8_t arcmsr_hbc_wait_msgint_ready(struct AdapterControlBlock *pACB) { struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC; unsigned char Retries = 0x00; uint32_t Index; do{ for(Index= 0; Index < 100; Index++){ if(readl(&phbcmu->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE){ writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR,&phbcmu->outbound_doorbell_clear);/*clear interrupt*/ return TRUE; } /* one us delay */ msleep(10); }/*max 1 seconds*/ }while(Retries++ < 20);/*max 20 sec*/ return FALSE; } static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb) { struct MessageUnit_A __iomem *reg = acb->pmuA; int retry_count = 30; writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0); do { if (arcmsr_hba_wait_msgint_ready(acb)) break; else { retry_count--; printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ timeout, retry count down = %d \n", acb->host->host_no, retry_count); } } while (retry_count != 0); } static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb) { struct MessageUnit_B *reg = acb->pmuB; int retry_count = 30; writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell); do { if (arcmsr_hbb_wait_msgint_ready(acb)) break; else { retry_count--; printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ timeout,retry count down = %d \n", acb->host->host_no, retry_count); } } while (retry_count != 0); } static void arcmsr_flush_hbc_cache(struct AdapterControlBlock *pACB) { struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC; int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */ writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0); writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); do{ if(arcmsr_hbc_wait_msgint_ready(pACB)){ break; }else{ retry_count--; printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ timeout,retry count down = %d \n", pACB->host->host_no, retry_count); } }while(retry_count!=0); return; } static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb) { switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { arcmsr_flush_hba_cache(acb); } break; case ACB_ADAPTER_TYPE_B: { arcmsr_flush_hbb_cache(acb); } break; case ACB_ADAPTER_TYPE_C: { arcmsr_flush_hbc_cache(acb); } } } static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb) { struct pci_dev *pdev = acb->pdev; void *dma_coherent; dma_addr_t dma_coherent_handle; struct CommandControlBlock *ccb_tmp; int i = 0, j = 0; dma_addr_t cdb_phyaddr; unsigned long roundup_ccbsize = 0, offset; unsigned long max_xfer_len; unsigned long max_sg_entrys; uint32_t firm_config_version; for (i = 0; i < ARCMSR_MAX_TARGETID; i++) for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++) acb->devstate[i][j] = ARECA_RAID_GONE; max_xfer_len = ARCMSR_MAX_XFER_LEN; max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES; firm_config_version = acb->firm_cfg_version; if((firm_config_version & 0xFF) >= 3){ max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 4M byte */ max_sg_entrys = (max_xfer_len/4096); } acb->host->max_sectors = max_xfer_len/512; acb->host->sg_tablesize = SG_ALL; roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (SG_ALL - 1) * sizeof(struct SG64ENTRY), 32); acb->uncache_size = roundup_ccbsize * ARCMSR_MAX_FREECCB_NUM + 32; dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL); if(!dma_coherent){ printk("arcmsr%d: dma_alloc_coherent got error \n", acb->host->host_no); return -ENOMEM; } acb->dma_coherent = dma_coherent; acb->dma_coherent_handle = dma_coherent_handle; memset(dma_coherent, 0, acb->uncache_size); offset = roundup((unsigned long)dma_coherent, 32) - (unsigned long)dma_coherent; dma_coherent_handle = dma_coherent_handle + offset; dma_coherent = (struct CommandControlBlock *)dma_coherent + offset; ccb_tmp = dma_coherent; acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle; for(i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++){ cdb_phyaddr = dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb); ccb_tmp->cdb_phyaddr_pattern = ((acb->adapter_type == ACB_ADAPTER_TYPE_C) ? cdb_phyaddr : (cdb_phyaddr >> 5)); acb->pccb_pool[i] = ccb_tmp; ccb_tmp->acb = acb; INIT_LIST_HEAD(&ccb_tmp->list); list_add_tail(&ccb_tmp->list, &acb->ccb_free_list); ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize); dma_coherent_handle = dma_coherent_handle + roundup_ccbsize; } return 0; } #if ARCMSR_FW_POLLING static void arcmsr_message_isr_bh_fn(void *pacb) { struct AdapterControlBlock *acb = (struct AdapterControlBlock *)pacb; switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { struct MessageUnit_A __iomem *reg = acb->pmuA; char *acb_dev_map = (char *)acb->device_map; uint32_t __iomem *signature = (uint32_t __iomem*) (®->message_rwbuffer[0]); char __iomem *devicemap = (char __iomem*) (®->message_rwbuffer[21]); int target, lun; struct scsi_device *psdev; char diff; atomic_inc(&acb->rq_map_token); if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) { for(target = 0; target < ARCMSR_MAX_TARGETID -1; target++) { diff = (*acb_dev_map)^readb(devicemap); if (diff != 0) { char temp; *acb_dev_map = readb(devicemap); temp =*acb_dev_map; for(lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) { if((temp & 0x01)==1 && (diff & 0x01) == 1) { scsi_add_device(acb->host, 0, target, lun); }else if((temp & 0x01) == 0 && (diff & 0x01) == 1) { psdev = scsi_device_lookup(acb->host, 0, target, lun); if (psdev != NULL ) { scsi_remove_device(psdev); scsi_device_put(psdev); } } temp >>= 1; diff >>= 1; } } devicemap++; acb_dev_map++; } } break; } case ACB_ADAPTER_TYPE_B: { struct MessageUnit_B *reg = acb->pmuB; char *acb_dev_map = (char *)acb->device_map; uint32_t __iomem *signature = (uint32_t __iomem*)(®->message_rwbuffer[0]); char __iomem *devicemap = (char __iomem*)(®->message_rwbuffer[21]); int target, lun; struct scsi_device *psdev; char diff; atomic_inc(&acb->rq_map_token); if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) { for(target = 0; target < ARCMSR_MAX_TARGETID -1; target++) { diff = (*acb_dev_map)^readb(devicemap); if (diff != 0) { char temp; *acb_dev_map = readb(devicemap); temp =*acb_dev_map; for(lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) { if((temp & 0x01)==1 && (diff & 0x01) == 1) { scsi_add_device(acb->host, 0, target, lun); }else if((temp & 0x01) == 0 && (diff & 0x01) == 1) { psdev = scsi_device_lookup(acb->host, 0, target, lun); if (psdev != NULL ) { scsi_remove_device(psdev); scsi_device_put(psdev); } } temp >>= 1; diff >>= 1; } } devicemap++; acb_dev_map++; } } } break; case ACB_ADAPTER_TYPE_C: { struct MessageUnit_C *reg = acb->pmuC; char *acb_dev_map = (char *)acb->device_map; uint32_t __iomem *signature = (uint32_t __iomem*)(®->msgcode_rwbuffer[0]); char __iomem *devicemap = (char __iomem*)(®->msgcode_rwbuffer[21]); int target, lun; struct scsi_device *psdev; char diff; atomic_inc(&acb->rq_map_token); if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) { for(target = 0; target < ARCMSR_MAX_TARGETID -1; target++) { diff = (*acb_dev_map)^readb(devicemap); if (diff != 0) { char temp; *acb_dev_map = readb(devicemap); temp =*acb_dev_map; for(lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) { if((temp & 0x01)==1 && (diff & 0x01) == 1) { scsi_add_device(acb->host, 0, target, lun); }else if((temp & 0x01) == 0 && (diff & 0x01) == 1) { psdev = scsi_device_lookup(acb->host, 0, target, lun); if (psdev != NULL ) { scsi_remove_device(psdev); scsi_device_put(psdev); } } temp >>= 1; diff >>= 1; } } devicemap++; acb_dev_map++; } } } } } #endif static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id) { struct Scsi_Host *host; struct AdapterControlBlock *acb; uint8_t bus,dev_fun; int error; error = pci_enable_device(pdev); if(error){ return -ENODEV; } host = scsi_host_alloc(&arcmsr_scsi_host_template, sizeof(struct AdapterControlBlock)); if(!host){ goto pci_disable_dev; } error = pci_set_dma_mask(pdev, DMA_64BIT_MASK); if(error){ error = pci_set_dma_mask(pdev, DMA_32BIT_MASK); if(error){ printk(KERN_WARNING "scsi%d: No suitable DMA mask available\n", host->host_no); goto scsi_host_release; } } init_waitqueue_head(&wait_q); bus = pdev->bus->number; dev_fun = pdev->devfn; acb = (struct AdapterControlBlock *) host->hostdata; memset(acb,0,sizeof(struct AdapterControlBlock)); acb->pdev = pdev; acb->host = host; host->max_lun = ARCMSR_MAX_TARGETLUN; host->max_id = ARCMSR_MAX_TARGETID; /*16:8*/ host->max_cmd_len = 16; /*this is issue of 64bit LBA ,over 2T byte*/ host->can_queue = ARCMSR_MAX_FREECCB_NUM; /* max simultaneous cmds */ host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN; host->this_id = ARCMSR_SCSI_INITIATOR_ID; host->unique_id = (bus << 8) | dev_fun; pci_set_drvdata(pdev, host); pci_set_master(pdev); error = pci_request_regions(pdev, "arcmsr"); if(error){ goto scsi_host_release; } spin_lock_init(&acb->eh_lock); spin_lock_init(&acb->ccblist_lock); acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED | ACB_F_MESSAGE_RQBUFFER_CLEARED | ACB_F_MESSAGE_WQBUFFER_READED); acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER; INIT_LIST_HEAD(&acb->ccb_free_list); arcmsr_define_adapter_type(acb); error = arcmsr_remap_pciregion(acb); if(!error){ goto pci_release_regs; } error = arcmsr_get_firmware_spec(acb); if(!error){ goto unmap_pci_region; } error = arcmsr_alloc_ccb_pool(acb); if(error){ goto free_hbb_mu; } arcmsr_iop_init(acb); error = scsi_add_host(host, &pdev->dev); if(error){ goto RAID_controller_stop; } error = request_irq(pdev->irq, arcmsr_do_interrupt, IRQF_SHARED, "arcmsr", acb); if(error){ goto scsi_host_remove; } host->irq = pdev->irq; scsi_scan_host(host); #if ARCMSR_FW_POLLING INIT_WORK(&acb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn, acb); atomic_set(&acb->rq_map_token, 16); atomic_set(&acb->ante_token_value, 16); acb->fw_flag = FW_NORMAL; init_timer(&acb->eternal_timer); acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ); acb->eternal_timer.data = (unsigned long) acb; acb->eternal_timer.function = &arcmsr_request_device_map; add_timer(&acb->eternal_timer); #endif //if(arcmsr_alloc_sysfs_attr(acb)) // goto out_free_sysfs; return 0; out_free_sysfs: scsi_host_remove: scsi_remove_host(host); RAID_controller_stop: arcmsr_stop_adapter_bgrb(acb); arcmsr_flush_adapter_cache(acb); arcmsr_free_ccb_pool(acb); free_hbb_mu: arcmsr_free_hbb_mu(acb); unmap_pci_region: arcmsr_unmap_pciregion(acb); pci_release_regs: pci_release_regions(pdev); scsi_host_release: scsi_host_put(host); pci_disable_dev: pci_disable_device(pdev); return -ENODEV; } static uint8_t arcmsr_abort_hba_allcmd(struct AdapterControlBlock *acb) { struct MessageUnit_A __iomem *reg = acb->pmuA; writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0); if (!arcmsr_hba_wait_msgint_ready(acb)){ printk(KERN_NOTICE "arcmsr%d: wait 'abort all outstanding command' timeout \n" , acb->host->host_no); return FALSE; } return TRUE; } static uint8_t arcmsr_abort_hbb_allcmd(struct AdapterControlBlock *acb) { struct MessageUnit_B *reg = acb->pmuB; writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell); if (!arcmsr_hbb_wait_msgint_ready(acb)) { printk(KERN_NOTICE "arcmsr%d: wait 'abort all outstanding command' timeout \n" , acb->host->host_no); return FALSE; } return TRUE; } static uint8_t arcmsr_abort_hbc_allcmd(struct AdapterControlBlock *pACB) { struct MessageUnit_C *reg =(struct MessageUnit_C *)pACB->pmuC; writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0); writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); if(!arcmsr_hbc_wait_msgint_ready(pACB)){ printk(KERN_NOTICE "arcmsr%d: wait 'abort all outstanding command' timeout \n" , pACB->host->host_no); return FALSE; } return TRUE; } static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb) { uint8_t rtnval = 0; switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { rtnval = arcmsr_abort_hba_allcmd(acb); } break; case ACB_ADAPTER_TYPE_B: { rtnval = arcmsr_abort_hbb_allcmd(acb); } break; case ACB_ADAPTER_TYPE_C: { rtnval = arcmsr_abort_hbc_allcmd(acb); } } return rtnval; } static bool arcmsr_hbb_enable_driver_mode(struct AdapterControlBlock *pacb) { struct MessageUnit_B *reg = pacb->pmuB; writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell); if(!arcmsr_hbb_wait_msgint_ready(pacb)){ printk(KERN_ERR "arcmsr%d: can't set driver mode. \n", pacb->host->host_no); return false; } return true; } static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb) { struct AdapterControlBlock *acb=ccb->acb; struct scsi_cmnd *pcmd=ccb->pcmd; struct scatterlist *sl; #if ARCMSR_DEBUG printk("arcmsr_pci_unmap_dma............................\n"); #endif sl = (struct scatterlist *) pcmd->request_buffer; if(pcmd->use_sg != 0){ pci_unmap_sg(acb->pdev, sl, pcmd->use_sg, pcmd->sc_data_direction); }else if(pcmd->request_bufflen != 0){ pci_unmap_single(acb->pdev,(dma_addr_t)(unsigned long)pcmd->SCp.ptr,pcmd->request_bufflen, pcmd->sc_data_direction); } } static void arcmsr_ccb_complete(struct CommandControlBlock *ccb) { struct AdapterControlBlock *acb = ccb->acb; struct scsi_cmnd *pcmd = ccb->pcmd; unsigned long flags; atomic_dec(&acb->ccboutstandingcount); arcmsr_pci_unmap_dma(ccb); ccb->startdone = ARCMSR_CCB_DONE; spin_lock_irqsave(&acb->ccblist_lock, flags); list_add_tail(&ccb->list, &acb->ccb_free_list); spin_unlock_irqrestore(&acb->ccblist_lock, flags); pcmd->scsi_done(pcmd); } static void arcmsr_report_sense_info(struct CommandControlBlock *ccb) { struct scsi_cmnd *pcmd = ccb->pcmd; struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer; pcmd->result = DID_OK << 16; if (sensebuffer) { int sense_data_length = sizeof(struct SENSE_DATA) < SCSI_SENSE_BUFFERSIZE ? sizeof(struct SENSE_DATA) : SCSI_SENSE_BUFFERSIZE; memset(sensebuffer, 0, SCSI_SENSE_BUFFERSIZE); memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length); sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS; sensebuffer->Valid = 1; } } static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb) { u32 orig_mask = 0; switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A : { struct MessageUnit_A __iomem *reg = acb->pmuA; orig_mask = readl(®->outbound_intmask); writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \ ®->outbound_intmask); } break; case ACB_ADAPTER_TYPE_B : { struct MessageUnit_B *reg = acb->pmuB; orig_mask = readl(reg->iop2drv_doorbell_mask); writel(0, reg->iop2drv_doorbell_mask); } break; case ACB_ADAPTER_TYPE_C:{ struct MessageUnit_C *reg=(struct MessageUnit_C *)acb->pmuC; /* disable all outbound interrupt */ orig_mask = readl(®->host_int_mask); /* disable outbound message0 int */ writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, ®->host_int_mask); } break; } return orig_mask; } static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb, bool error) { uint8_t id, lun; id = ccb->pcmd->device->id; lun = ccb->pcmd->device->lun; if (!error) { if (acb->devstate[id][lun] == ARECA_RAID_GONE) acb->devstate[id][lun] = ARECA_RAID_GOOD; ccb->pcmd->result = DID_OK << 16; arcmsr_ccb_complete(ccb); }else{ switch (ccb->arcmsr_cdb.DeviceStatus) { case ARCMSR_DEV_SELECT_TIMEOUT: { acb->devstate[id][lun] = ARECA_RAID_GONE; ccb->pcmd->result = DID_NO_CONNECT << 16; arcmsr_ccb_complete(ccb); } break; case ARCMSR_DEV_ABORTED: case ARCMSR_DEV_INIT_FAIL: { acb->devstate[id][lun] = ARECA_RAID_GONE; ccb->pcmd->result = DID_BAD_TARGET << 16; arcmsr_ccb_complete(ccb); } break; case ARCMSR_DEV_CHECK_CONDITION: { acb->devstate[id][lun] = ARECA_RAID_GOOD; arcmsr_report_sense_info(ccb); arcmsr_ccb_complete(ccb); } break; default: printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d isr get command error done, \ but got unknown DeviceStatus = 0x%x \n" , acb->host->host_no , id , lun , ccb->arcmsr_cdb.DeviceStatus); acb->devstate[id][lun] = ARECA_RAID_GONE; ccb->pcmd->result = DID_NO_CONNECT << 16; arcmsr_ccb_complete(ccb); break; } } } static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error) { int id, lun; if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) { if (pCCB->startdone == ARCMSR_CCB_ABORTED) { struct scsi_cmnd *abortcmd = pCCB->pcmd; if (abortcmd) { id = abortcmd->device->id; lun = abortcmd->device->lun; abortcmd->result |= DID_ABORT << 16; arcmsr_ccb_complete(pCCB); printk(KERN_NOTICE "arcmsr%d: pCCB ='0x%p' isr got aborted command \n", acb->host->host_no, pCCB); } } printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \ done acb = '0x%p'" "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x" " ccboutstandingcount = %d \n" , acb->host->host_no , acb , pCCB , pCCB->acb , pCCB->startdone , atomic_read(&acb->ccboutstandingcount)); } arcmsr_report_ccb_state(acb, pCCB, error); } static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb) { int i = 0; uint32_t flag_ccb; struct ARCMSR_CDB *pARCMSR_CDB; bool error; struct CommandControlBlock *pCCB; switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { struct MessageUnit_A __iomem *reg = acb->pmuA; uint32_t outbound_intstatus; outbound_intstatus = readl(®->outbound_intstatus) & acb->outbound_int_enable; /*clear and abort all outbound posted Q*/ writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/ while(((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF) && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) { pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/ pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); error=(flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0)?TRUE:FALSE; arcmsr_drain_donequeue(acb, pCCB, error); } } break; case ACB_ADAPTER_TYPE_B: { struct MessageUnit_B *reg = acb->pmuB; /*clear all outbound posted Q*/ writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, ®->iop2drv_doorbell); /* clear doorbell interrupt */ for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) { if ((flag_ccb = readl(®->done_qbuffer[i])) != 0){ writel(0, ®->done_qbuffer[i]); pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/ pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0)?TRUE:FALSE; arcmsr_drain_donequeue(acb, pCCB, error); } reg->post_qbuffer[i]=0; } reg->doneq_index = 0; reg->postq_index = 0; } break; case ACB_ADAPTER_TYPE_C: { struct MessageUnit_C *reg = acb->pmuC; struct ARCMSR_CDB *pARCMSR_CDB; uint32_t flag_ccb, ccb_cdb_phy; bool error; struct CommandControlBlock *pCCB; while((readl(®->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)){ /*need to do*/ flag_ccb = readl(®->outbound_queueport_low); ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0); pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+ccb_cdb_phy);/*frame must be 32 bytes aligned*/ pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)?TRUE:FALSE; arcmsr_drain_donequeue(acb, pCCB, error); } } } } static void arcmsr_remove(struct pci_dev *pdev) { struct Scsi_Host *host = pci_get_drvdata(pdev); struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; int poll_count = 0; //arcmsr_free_sysfs_attr(acb); scsi_remove_host(host); scsi_host_put(host); #if ARCMSR_FW_POLLING flush_scheduled_work(); del_timer_sync(&acb->eternal_timer); #endif arcmsr_disable_outbound_ints(acb); arcmsr_stop_adapter_bgrb(acb); arcmsr_flush_adapter_cache(acb); acb->acb_flags |= ACB_F_SCSISTOPADAPTER; acb->acb_flags &= ~ACB_F_IOP_INITED; for (poll_count = 0; poll_count < ARCMSR_MAX_OUTSTANDING_CMD; poll_count++){ if (!atomic_read(&acb->ccboutstandingcount)) break; arcmsr_interrupt(acb);/* FIXME: need spinlock */ msleep(25); } if (atomic_read(&acb->ccboutstandingcount)) { int i; arcmsr_abort_allcmd(acb); arcmsr_done4abort_postqueue(acb); for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { struct CommandControlBlock *ccb = acb->pccb_pool[i]; if (ccb->startdone == ARCMSR_CCB_START) { ccb->startdone = ARCMSR_CCB_ABORTED; ccb->pcmd->result = DID_ABORT << 16; arcmsr_ccb_complete(ccb); } } } free_irq(pdev->irq, acb); arcmsr_free_ccb_pool(acb); arcmsr_free_hbb_mu(acb); arcmsr_unmap_pciregion(acb); pci_release_regions(pdev); pci_disable_device(pdev); pci_set_drvdata(pdev, NULL); } static void arcmsr_shutdown(struct pci_dev *pdev) { struct Scsi_Host *host = pci_get_drvdata(pdev); struct AdapterControlBlock *acb = (struct AdapterControlBlock *)host->hostdata; arcmsr_disable_outbound_ints(acb); #if ARCMSR_FW_POLLING del_timer_sync(&acb->eternal_timer); flush_scheduled_work(); #endif arcmsr_stop_adapter_bgrb(acb); arcmsr_flush_adapter_cache(acb); } static int arcmsr_module_init(void) { int error = 0; error = pci_register_driver(&arcmsr_pci_driver); return error; } static void arcmsr_module_exit(void) { pci_unregister_driver(&arcmsr_pci_driver); } module_init(arcmsr_module_init); module_exit(arcmsr_module_exit); static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb, u32 intmask_org) { u32 mask; switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A : { struct MessageUnit_A __iomem *reg = acb->pmuA; mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE | ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE| ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE); writel(mask, ®->outbound_intmask); acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff; } break; case ACB_ADAPTER_TYPE_B : { struct MessageUnit_B *reg = acb->pmuB; mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK | ARCMSR_IOP2DRV_DATA_READ_OK | ARCMSR_IOP2DRV_CDB_DONE | ARCMSR_IOP2DRV_MESSAGE_CMD_DONE); writel(mask, reg->iop2drv_doorbell_mask); acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f; } break; case ACB_ADAPTER_TYPE_C : { struct MessageUnit_C *reg = acb->pmuC; mask=~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK |ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK); writel(intmask_org & mask, ®->host_int_mask); acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f; } } } static int arcmsr_build_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd) { struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb; uint8_t *psge = (uint8_t *)&arcmsr_cdb->u; __le32 address_lo, address_hi; int arccdbsize = 0x30, sgcount = 0; __le32 length = 0; int i; int use_sg; unsigned request_bufflen; ccb->pcmd = pcmd; memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB)); arcmsr_cdb->TargetID = pcmd->device->id; arcmsr_cdb->LUN = pcmd->device->lun; arcmsr_cdb->Function = 1; arcmsr_cdb->Context = 0; memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len); request_bufflen = pcmd->request_bufflen; use_sg = pcmd->use_sg; if(use_sg > 0){ __le32 length = 0, length_sum =0; int i; struct scatterlist *sl; sl = (struct scatterlist *) pcmd->request_buffer; sgcount=pci_map_sg(acb->pdev, sl, pcmd->use_sg, pcmd->sc_data_direction); if(sgcount > (acb->host->sg_tablesize)){ unsigned long flags; vmk_WarningMessage("the sg count is over the limit...................... \n"); spin_lock_irqsave(&acb->ccblist_lock, flags); list_add_tail(&ccb->list, &acb->ccb_free_list); spin_unlock_irqrestore(&acb->ccblist_lock, flags); return FAILED; } if(sgcount){ for(i = 0; i < sgcount; i++){ length = cpu_to_le32(sg_dma_len(sl)); address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sl))); address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sl))); if(address_hi == 0){ struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge; pdma_sg->address = address_lo; pdma_sg->length = length; psge += sizeof (struct SG32ENTRY); arccdbsize += sizeof (struct SG32ENTRY); }else{ struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge; pdma_sg->addresshigh = address_hi; pdma_sg->address = address_lo; pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR); psge += sizeof (struct SG64ENTRY); arccdbsize += sizeof (struct SG64ENTRY); } sl = sg_next(sl); } arcmsr_cdb->sgcount = (uint8_t)sgcount; arcmsr_cdb->DataLength = request_bufflen; arcmsr_cdb->msgPages = arccdbsize/0x100 + (arccdbsize % 0x100 ? 1 : 0); if( arccdbsize > 256) arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE; } }else if(request_bufflen){ dma_addr_t dma_addr; dma_addr = pci_map_single(acb->pdev, pcmd->request_buffer, pcmd->request_bufflen, pcmd->sc_data_direction); /* We hide it here for later unmap. */ pcmd->SCp.ptr = (char *)(unsigned long)dma_addr; address_lo = cpu_to_le32(dma_addr_lo32(dma_addr)); address_hi = cpu_to_le32(dma_addr_hi32(dma_addr)); if(address_hi==0) { struct SG32ENTRY* pdma_sg = (struct SG32ENTRY*)psge; pdma_sg->address = address_lo; pdma_sg->length = request_bufflen; arccdbsize += sizeof (struct SG32ENTRY); } else{ struct SG64ENTRY* pdma_sg=(struct SG64ENTRY*)psge; pdma_sg->addresshigh = address_hi; pdma_sg->address = address_lo; pdma_sg->length = request_bufflen|cpu_to_le32(IS_SG64_ADDR); arccdbsize += sizeof (struct SG64ENTRY); } arcmsr_cdb->sgcount=1; arcmsr_cdb->DataLength = request_bufflen; } if (pcmd->cmnd[0]|WRITE_6 || pcmd->cmnd[0]|WRITE_10 || pcmd->cmnd[0]|WRITE_12 ){ arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE; } ccb->arc_cdb_size = arccdbsize; return SUCCESS; } static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb) { uint32_t cdb_phyaddr_pattern = ccb->cdb_phyaddr_pattern; struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb; atomic_inc(&acb->ccboutstandingcount); ccb->startdone = ARCMSR_CCB_START; switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { struct MessageUnit_A __iomem *reg = acb->pmuA; if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) writel(cdb_phyaddr_pattern | ARCMSR_CCBPOST_FLAG_SGL_BSIZE, ®->inbound_queueport); else { writel(cdb_phyaddr_pattern, ®->inbound_queueport); } } break; case ACB_ADAPTER_TYPE_B: { struct MessageUnit_B *reg = acb->pmuB; uint32_t ending_index, index = reg->postq_index; ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE); writel(0, ®->post_qbuffer[ending_index]); if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) { writel(cdb_phyaddr_pattern | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,\ ®->post_qbuffer[index]); }else{ writel(cdb_phyaddr_pattern, ®->post_qbuffer[index]); } index++; index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */ reg->postq_index = index; writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell); } break; case ACB_ADAPTER_TYPE_C: { struct MessageUnit_C *phbcmu=(struct MessageUnit_C *)acb->pmuC; uint32_t ccb_post_stamp, arc_cdb_size; arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300:ccb->arc_cdb_size; ccb_post_stamp = (cdb_phyaddr_pattern | ((arc_cdb_size-1) >> 6) |1); if(acb->cdb_phyaddr_hi32){ writel(acb->cdb_phyaddr_hi32, &phbcmu->inbound_queueport_high); writel(ccb_post_stamp, &phbcmu->inbound_queueport_low); }else{ writel(ccb_post_stamp, &phbcmu->inbound_queueport_low); } } } } static void arcmsr_stop_hba_bgrb(struct AdapterControlBlock *acb) { struct MessageUnit_A __iomem *reg = acb->pmuA; acb->acb_flags &= ~ACB_F_MSG_START_BGRB; writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0); if (!arcmsr_hba_wait_msgint_ready(acb)) { printk(KERN_NOTICE "arcmsr%d: wait 'stop adapter background rebulid' timeout \n" , acb->host->host_no); } } static void arcmsr_stop_hbb_bgrb(struct AdapterControlBlock *acb) { struct MessageUnit_B *reg = acb->pmuB; acb->acb_flags &= ~ACB_F_MSG_START_BGRB; writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell); if (!arcmsr_hbb_wait_msgint_ready(acb)) { printk(KERN_NOTICE "arcmsr%d: wait 'stop adapter background rebulid' timeout \n" , acb->host->host_no); } } static void arcmsr_stop_hbc_bgrb(struct AdapterControlBlock *pACB) { struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC; pACB->acb_flags &= ~ACB_F_MSG_START_BGRB; writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0); writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); if(!arcmsr_hbc_wait_msgint_ready(pACB)){ printk(KERN_NOTICE "arcmsr%d: wait 'stop adapter background rebulid' timeout \n" , pACB->host->host_no); } return; } static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb) { switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { arcmsr_stop_hba_bgrb(acb); } break; case ACB_ADAPTER_TYPE_B: { arcmsr_stop_hbb_bgrb(acb); } break; case ACB_ADAPTER_TYPE_C: { arcmsr_stop_hbc_bgrb(acb); } } } static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb) { dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle); } void arcmsr_iop_message_read(struct AdapterControlBlock *acb) { switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { struct MessageUnit_A __iomem *reg = acb->pmuA; writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); } break; case ACB_ADAPTER_TYPE_B: { struct MessageUnit_B *reg = acb->pmuB; writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell); } break; case ACB_ADAPTER_TYPE_C: { struct MessageUnit_C __iomem *reg = acb->pmuC; writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell); } } } static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb) { switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { struct MessageUnit_A __iomem *reg = acb->pmuA; /* ** push inbound doorbell tell iop, driver data write ok ** and wait reply on next hwinterrupt for next Qbuffer post */ writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, ®->inbound_doorbell); } break; case ACB_ADAPTER_TYPE_B: { struct MessageUnit_B *reg = acb->pmuB; /* ** push inbound doorbell tell iop, driver data write ok ** and wait reply on next hwinterrupt for next Qbuffer post */ writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell); } break; case ACB_ADAPTER_TYPE_C: { struct MessageUnit_C __iomem *reg = acb->pmuC; /* ** push inbound doorbell tell iop, driver data write ok ** and wait reply on next hwinterrupt for next Qbuffer post */ writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, ®->inbound_doorbell); } break; } } struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb) { struct QBUFFER __iomem *qbuffer = NULL; switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { struct MessageUnit_A __iomem *reg = acb->pmuA; qbuffer = (struct QBUFFER __iomem *)®->message_rbuffer; } break; case ACB_ADAPTER_TYPE_B: { struct MessageUnit_B *reg = acb->pmuB; qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer; } break; case ACB_ADAPTER_TYPE_C: { struct MessageUnit_C *phbcmu=(struct MessageUnit_C *)acb->pmuC; qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer; } } return qbuffer; } static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb) { struct QBUFFER __iomem *pqbuffer = NULL; switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { struct MessageUnit_A __iomem *reg = acb->pmuA; pqbuffer = (struct QBUFFER __iomem *) ®->message_wbuffer; } break; case ACB_ADAPTER_TYPE_B: { struct MessageUnit_B *reg = acb->pmuB; pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer; } break; case ACB_ADAPTER_TYPE_C: { struct MessageUnit_C *reg=(struct MessageUnit_C *)acb->pmuC; pqbuffer = (struct QBUFFER __iomem *)®->message_wbuffer; } } return pqbuffer; } static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb) { struct QBUFFER __iomem *prbuffer; struct QBUFFER *pQbuffer; uint8_t __iomem *iop_data; int32_t my_empty_len, iop_len, rqbuf_firstindex, rqbuf_lastindex; rqbuf_lastindex = acb->rqbuf_lastindex; rqbuf_firstindex = acb->rqbuf_firstindex; prbuffer = arcmsr_get_iop_rqbuffer(acb); iop_data = (uint8_t __iomem *)prbuffer->data; iop_len = prbuffer->data_len; my_empty_len = (rqbuf_firstindex - rqbuf_lastindex -1)&(ARCMSR_MAX_QBUFFER -1); if (my_empty_len >= iop_len) { while (iop_len > 0) { pQbuffer = (struct QBUFFER *)&acb->rqbuffer[rqbuf_lastindex]; memcpy(pQbuffer, iop_data,1); rqbuf_lastindex++; rqbuf_lastindex %= ARCMSR_MAX_QBUFFER; iop_data++; iop_len--; } acb->rqbuf_lastindex = rqbuf_lastindex; arcmsr_iop_message_read(acb); } else { acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW; } } static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb) { acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED; if (acb->wqbuf_firstindex != acb->wqbuf_lastindex) { uint8_t *pQbuffer; struct QBUFFER __iomem *pwbuffer; uint8_t __iomem *iop_data; int32_t allxfer_len = 0; acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); pwbuffer = arcmsr_get_iop_wqbuffer(acb); iop_data = (uint8_t __iomem *)pwbuffer->data; while ((acb->wqbuf_firstindex != acb->wqbuf_lastindex) && \ (allxfer_len < 124)) { pQbuffer = &acb->wqbuffer[acb->wqbuf_firstindex]; memcpy(iop_data, pQbuffer, 1); acb->wqbuf_firstindex++; acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER; iop_data++; allxfer_len++; } pwbuffer->data_len = allxfer_len; arcmsr_iop_message_wrote(acb); } if (acb->wqbuf_firstindex == acb->wqbuf_lastindex) { acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED; } } static void arcmsr_hba_doorbell_isr(struct AdapterControlBlock *acb) { uint32_t outbound_doorbell; struct MessageUnit_A __iomem *reg = acb->pmuA; outbound_doorbell = readl(®->outbound_doorbell); writel(outbound_doorbell, ®->outbound_doorbell); if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) { arcmsr_iop2drv_data_wrote_handle(acb); } if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) { arcmsr_iop2drv_data_read_handle(acb); } } static void arcmsr_hbc_doorbell_isr(struct AdapterControlBlock *pACB) { uint32_t outbound_doorbell; struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC; /* ******************************************************************* ** Maybe here we need to check wrqbuffer_lock is lock or not ** DOORBELL: din! don! ** check if there are any mail need to pack from firmware ******************************************************************* */ outbound_doorbell = readl(®->outbound_doorbell); writel(outbound_doorbell, ®->outbound_doorbell_clear);/*clear interrupt*/ if(outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK){ arcmsr_iop2drv_data_wrote_handle(pACB); } if(outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK){ arcmsr_iop2drv_data_read_handle(pACB); } #if ARCMSR_FW_POLLING if(outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE){ arcmsr_hbc_message_isr(pACB); /* messenger of "driver to iop commands" */ } #endif return; } static void arcmsr_hba_postqueue_isr(struct AdapterControlBlock *acb) { uint32_t flag_ccb; struct MessageUnit_A __iomem *reg = acb->pmuA; struct ARCMSR_CDB *pARCMSR_CDB; struct CommandControlBlock *pCCB; bool error; while ((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF) { pARCMSR_CDB=(struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/ pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); error= (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0)?TRUE:FALSE; arcmsr_drain_donequeue(acb, pCCB, error); } } static void arcmsr_hbb_postqueue_isr(struct AdapterControlBlock *acb) { uint32_t index; uint32_t flag_ccb; struct MessageUnit_B *reg = acb->pmuB; struct ARCMSR_CDB *pARCMSR_CDB; struct CommandControlBlock *pCCB; bool error; index = reg->doneq_index; while ((flag_ccb = readl(®->done_qbuffer[index])) != 0) { writel(0, ®->done_qbuffer[index]); pARCMSR_CDB=(struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/ pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); error= (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0)?TRUE:FALSE; arcmsr_drain_donequeue(acb, pCCB, error); index++; index %= ARCMSR_MAX_HBB_POSTQUEUE; reg->doneq_index = index; } } static void arcmsr_hbc_postqueue_isr(struct AdapterControlBlock *acb) { struct MessageUnit_C *phbcmu; struct ARCMSR_CDB *arcmsr_cdb; struct CommandControlBlock *ccb; uint32_t flag_ccb, ccb_cdb_phy, throttling = 0; int error; phbcmu = (struct MessageUnit_C *)acb->pmuC; /* areca cdb command done */ /* Use correct offset and size for syncing */ while (readl(&phbcmu->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR){ /* check if command done with no error*/ flag_ccb = readl(&phbcmu->outbound_queueport_low); ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);/*frame must be 32 bytes aligned*/ arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy); ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)?TRUE:FALSE; /* check if command done with no error */ arcmsr_drain_donequeue(acb, ccb, error); if(throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) { writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING, &phbcmu->inbound_doorbell); break; } throttling++; } return; } /* ********************************************************************************** ** Handle a message interrupt ** ** The only message interrupt we expect is in response to a query for the current adapter config. ** We want this in order to compare the drivemap so that we can detect newly-attached drives. ********************************************************************************** */ #if ARCMSR_FW_POLLING static void arcmsr_hba_message_isr(struct AdapterControlBlock *acb) { struct MessageUnit_A *reg = acb->pmuA; /*clear interrupt and message state*/ writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, ®->outbound_intstatus); schedule_work(&acb->arcmsr_do_message_isr_bh); } static void arcmsr_hbb_message_isr(struct AdapterControlBlock *acb) { struct MessageUnit_B *reg = acb->pmuB; /*clear interrupt and message state*/ writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); schedule_work(&acb->arcmsr_do_message_isr_bh); } /* ********************************************************************************** ** Handle a message interrupt ** ** The only message interrupt we expect is in response to a query for the ** current adapter config. ** We want this in order to compare the drivemap so that we can detect newly-attached drives. ********************************************************************************** */ static void arcmsr_hbc_message_isr(struct AdapterControlBlock *acb) { struct MessageUnit_C *reg = acb->pmuC; /*clear interrupt and message state*/ writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, ®->outbound_doorbell_clear); schedule_work(&acb->arcmsr_do_message_isr_bh); } #endif static int arcmsr_handle_hba_isr(struct AdapterControlBlock *acb) { uint32_t outbound_intstatus; struct MessageUnit_A __iomem *reg = acb->pmuA; outbound_intstatus = readl(®->outbound_intstatus) & acb->outbound_int_enable; if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT)) { return 1; } writel(outbound_intstatus, ®->outbound_intstatus); if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) { arcmsr_hba_doorbell_isr(acb); } if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) { arcmsr_hba_postqueue_isr(acb); } #if ARCMSR_FW_POLLING if(outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) { /* messenger of "driver to iop commands" */ arcmsr_hba_message_isr(acb); } #endif return 0; } static int arcmsr_handle_hbb_isr(struct AdapterControlBlock *acb) { uint32_t outbound_doorbell; struct MessageUnit_B *reg = acb->pmuB; outbound_doorbell = readl(reg->iop2drv_doorbell) & acb->outbound_int_enable; if (!outbound_doorbell) return 1; writel(~outbound_doorbell, reg->iop2drv_doorbell); /*in case the last action of doorbell interrupt clearance is cached, this action can push HW to write down the clear bit*/ readl(reg->iop2drv_doorbell); writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell); if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) { arcmsr_iop2drv_data_wrote_handle(acb); } if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK) { arcmsr_iop2drv_data_read_handle(acb); } if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE) { arcmsr_hbb_postqueue_isr(acb); } #if ARCMSR_FW_POLLING if(outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) { /* messenger of "driver to iop commands" */ arcmsr_hbb_message_isr(acb); } #endif return 0; } static int arcmsr_handle_hbc_isr(struct AdapterControlBlock *pACB) { uint32_t host_interrupt_status; struct MessageUnit_C *phbcmu=(struct MessageUnit_C *)pACB->pmuC; /* ********************************************* ** check outbound intstatus ********************************************* */ host_interrupt_status = readl(&phbcmu->host_int_status); if(!host_interrupt_status){ /*it must be share irq*/ return FALSE; } /* MU ioctl transfer doorbell interrupts*/ if(host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR){ arcmsr_hbc_doorbell_isr(pACB); /* messenger of "ioctl message read write" */ } /* MU post queue interrupts*/ if(host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR){ arcmsr_hbc_postqueue_isr(pACB); /* messenger of "scsi commands" */ } return TRUE; } static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb) { switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { if (arcmsr_handle_hba_isr(acb)) { return IRQ_NONE; } } break; case ACB_ADAPTER_TYPE_B: { if (arcmsr_handle_hbb_isr(acb)) { return IRQ_NONE; } } break; case ACB_ADAPTER_TYPE_C: { if(arcmsr_handle_hbc_isr(acb)) { return IRQ_NONE; } } } return IRQ_HANDLED; } static void arcmsr_iop_parking(struct AdapterControlBlock *acb) { if (acb) { /* stop adapter background rebuild */ if (acb->acb_flags & ACB_F_MSG_START_BGRB) { uint32_t intmask_org; acb->acb_flags &= ~ACB_F_MSG_START_BGRB; intmask_org = arcmsr_disable_outbound_ints(acb); arcmsr_stop_adapter_bgrb(acb); arcmsr_flush_adapter_cache(acb); arcmsr_enable_outbound_ints(acb, intmask_org); } } } void arcmsr_post_ioctldata2iop(struct AdapterControlBlock *acb) { int32_t wqbuf_firstindex, wqbuf_lastindex; uint8_t *pQbuffer; struct QBUFFER __iomem *pwbuffer; uint8_t __iomem *iop_data; int32_t allxfer_len = 0; pwbuffer = arcmsr_get_iop_wqbuffer(acb); iop_data = (uint8_t __iomem *)pwbuffer->data; if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) { acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); wqbuf_firstindex = acb->wqbuf_firstindex; wqbuf_lastindex = acb->wqbuf_lastindex; while ((wqbuf_firstindex != wqbuf_lastindex) && (allxfer_len < 124)) { pQbuffer = &acb->wqbuffer[wqbuf_firstindex]; memcpy(iop_data, pQbuffer, 1); wqbuf_firstindex++; wqbuf_firstindex %= ARCMSR_MAX_QBUFFER; iop_data++; allxfer_len++; } acb->wqbuf_firstindex = wqbuf_firstindex; pwbuffer->data_len = allxfer_len; arcmsr_iop_message_wrote(acb); } } static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, struct scsi_cmnd *cmd) { struct CMD_MESSAGE_FIELD *pcmdmessagefld; int retvalue = 0, transfer_len = 0; char *buffer; struct scatterlist *sg; uint32_t controlcode = (uint32_t ) cmd->cmnd[5] << 24 | (uint32_t ) cmd->cmnd[6] << 16 | (uint32_t ) cmd->cmnd[7] << 8 | (uint32_t ) cmd->cmnd[8]; /* 4 bytes: Areca io control code */ sg = (struct scatterlist *)cmd->request_buffer; buffer = kmap_atomic(sg->page, KM_IRQ0) + sg->offset; if (scsi_sg_count(cmd) > 1) { retvalue = ARCMSR_MESSAGE_FAIL; goto message_out; } transfer_len += sg->length; if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) { retvalue = ARCMSR_MESSAGE_FAIL; goto message_out; } pcmdmessagefld = (struct CMD_MESSAGE_FIELD *) buffer; switch(controlcode) { case ARCMSR_MESSAGE_READ_RQBUFFER: { unsigned char *ver_addr; uint8_t *pQbuffer, *ptmpQbuffer; int32_t allxfer_len = 0; ver_addr = kmalloc(1032, GFP_ATOMIC); if (!ver_addr) { retvalue = ARCMSR_MESSAGE_FAIL; goto message_out; } ptmpQbuffer = ver_addr; while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex) && (allxfer_len < 1031)) { pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex]; memcpy(ptmpQbuffer, pQbuffer, 1); acb->rqbuf_firstindex++; acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER; ptmpQbuffer++; allxfer_len++; } if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { struct QBUFFER __iomem *prbuffer; uint8_t __iomem *iop_data; int32_t iop_len; acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; prbuffer = arcmsr_get_iop_rqbuffer(acb); iop_data = prbuffer->data; iop_len = readl(&prbuffer->data_len); while (iop_len > 0) { acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data); acb->rqbuf_lastindex++; acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER; iop_data++; iop_len--; } arcmsr_iop_message_read(acb); } memcpy(pcmdmessagefld->messagedatabuffer, ver_addr, allxfer_len); pcmdmessagefld->cmdmessage.Length = allxfer_len; #if ARCMSR_FW_POLLING if(acb->fw_flag == FW_DEADLOCK) { pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; }else{ pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; } #endif pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; kfree(ver_addr); } break; case ARCMSR_MESSAGE_WRITE_WQBUFFER: { unsigned char *ver_addr; int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex; uint8_t *pQbuffer, *ptmpuserbuffer; ver_addr = kmalloc(1032, GFP_ATOMIC); if (!ver_addr) { retvalue = ARCMSR_MESSAGE_FAIL; goto message_out; } if(acb->fw_flag == FW_DEADLOCK) { pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; }else{ pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; } ptmpuserbuffer = ver_addr; user_len = pcmdmessagefld->cmdmessage.Length; memcpy(ptmpuserbuffer, pcmdmessagefld->messagedatabuffer, user_len); wqbuf_lastindex = acb->wqbuf_lastindex; wqbuf_firstindex = acb->wqbuf_firstindex; if (wqbuf_lastindex != wqbuf_firstindex) { struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)cmd->sense_buffer; arcmsr_post_ioctldata2iop(acb); /* has error report sensedata */ sensebuffer->ErrorCode = 0x70; sensebuffer->SenseKey = ILLEGAL_REQUEST; sensebuffer->AdditionalSenseLength = 0x0A; sensebuffer->AdditionalSenseCode = 0x20; sensebuffer->Valid = 1; retvalue = ARCMSR_MESSAGE_FAIL; } else { my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1) &(ARCMSR_MAX_QBUFFER - 1); if (my_empty_len >= user_len) { while (user_len > 0) { pQbuffer = &acb->wqbuffer[acb->wqbuf_lastindex]; memcpy(pQbuffer, ptmpuserbuffer, 1); acb->wqbuf_lastindex++; acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER; ptmpuserbuffer++; user_len--; } if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) { acb->acb_flags &= ~ACB_F_MESSAGE_WQBUFFER_CLEARED; arcmsr_post_ioctldata2iop(acb); } } else { /* has error report sensedata */ struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)cmd->sense_buffer; sensebuffer->ErrorCode = 0x70; sensebuffer->SenseKey = ILLEGAL_REQUEST; sensebuffer->AdditionalSenseLength = 0x0A; sensebuffer->AdditionalSenseCode = 0x20; sensebuffer->Valid = 1; retvalue = ARCMSR_MESSAGE_FAIL; } } kfree(ver_addr); } break; case ARCMSR_MESSAGE_CLEAR_RQBUFFER: { uint8_t *pQbuffer = acb->rqbuffer; if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; arcmsr_iop_message_read(acb); } acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED; acb->rqbuf_firstindex = 0; acb->rqbuf_lastindex = 0; memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); #if ARCMSR_FW_POLLING if(acb->fw_flag == FW_DEADLOCK) { pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; }else{ pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; } #else pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; #endif } break; case ARCMSR_MESSAGE_CLEAR_WQBUFFER: { uint8_t *pQbuffer = acb->wqbuffer; if(acb->fw_flag == FW_DEADLOCK) { pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; }else{ pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; } if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; arcmsr_iop_message_read(acb); } acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED | ACB_F_MESSAGE_WQBUFFER_READED); acb->wqbuf_firstindex = 0; acb->wqbuf_lastindex = 0; memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); } break; case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: { uint8_t *pQbuffer; if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; arcmsr_iop_message_read(acb); } acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED | ACB_F_MESSAGE_RQBUFFER_CLEARED | ACB_F_MESSAGE_WQBUFFER_READED); acb->rqbuf_firstindex = 0; acb->rqbuf_lastindex = 0; acb->wqbuf_firstindex = 0; acb->wqbuf_lastindex = 0; pQbuffer = acb->rqbuffer; memset(pQbuffer, 0, sizeof(struct QBUFFER)); pQbuffer = acb->wqbuffer; memset(pQbuffer, 0, sizeof(struct QBUFFER)); #if ARCMSR_FW_POLLING if(acb->fw_flag == FW_DEADLOCK) { pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; }else{ pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; } #else pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; #endif } break; case ARCMSR_MESSAGE_RETURN_CODE_3F: { #if ARCMSR_FW_POLLING if(acb->fw_flag == FW_DEADLOCK) { pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; }else{ pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_3F; } #else pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; #endif break; } case ARCMSR_MESSAGE_SAY_HELLO: { char *hello_string = "Hello! I am ARCMSR"; #if ARCMSR_FW_POLLING if(acb->fw_flag == FW_DEADLOCK) { pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; }else{ pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; } #else pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; #endif memcpy(pcmdmessagefld->messagedatabuffer, hello_string , (int16_t)strlen(hello_string)); } break; case ARCMSR_MESSAGE_SAY_GOODBYE: #if ARCMSR_FW_POLLING if(acb->fw_flag == FW_DEADLOCK) { pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; } #endif arcmsr_iop_parking(acb); break; case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: #if ARCMSR_FW_POLLING if(acb->fw_flag == FW_DEADLOCK) { pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; } #endif arcmsr_flush_adapter_cache(acb); break; default: retvalue = ARCMSR_MESSAGE_FAIL; } message_out: sg = scsi_sglist(cmd); kunmap_atomic(buffer - sg->offset, KM_IRQ0); return retvalue; } static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb) { struct list_head *head = &acb->ccb_free_list; struct CommandControlBlock *ccb = NULL; unsigned long flags; spin_lock_irqsave(&acb->ccblist_lock, flags); if (!list_empty(head)) { ccb = list_entry(head->next, struct CommandControlBlock, list); list_del_init(&ccb->list); }else{ spin_unlock_irqrestore(&acb->ccblist_lock, flags); return 0; } spin_unlock_irqrestore(&acb->ccblist_lock, flags); return ccb; } static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb, struct scsi_cmnd *cmd) { switch (cmd->cmnd[0]) { case INQUIRY: { unsigned char inqdata[36]; char *buffer; struct scatterlist *sg; unsigned short use_sg; if (cmd->device->lun) { cmd->result = (DID_TIME_OUT << 16); cmd->scsi_done(cmd); return; } inqdata[0] = TYPE_PROCESSOR; /* Periph Qualifier & Periph Dev Type */ inqdata[1] = 0; /* rem media bit & Dev Type Modifier */ inqdata[2] = 0; /* ISO, ECMA, & ANSI versions */ inqdata[4] = 31; /* length of additional data */ strncpy(&inqdata[8], "Areca ", 8); /* Vendor Identification */ strncpy(&inqdata[16], "RAID controller ", 16); /* Product Identification */ strncpy(&inqdata[32], "R001", 4); /* Product Revision */ use_sg = cmd->use_sg; if (use_sg) { struct scatterlist *sg; sg = (struct scatterlist *) cmd->request_buffer; buffer = kmap_atomic(sg->page, KM_IRQ0) + sg->offset; }else{ buffer = cmd->request_buffer; } memcpy(buffer, inqdata, sizeof(inqdata)); if (cmd->use_sg){ struct scatterlist *sg; sg = (struct scatterlist *) cmd->request_buffer; kunmap_atomic(buffer - sg->offset, KM_IRQ0); } cmd->scsi_done(cmd); } break; case WRITE_BUFFER: case READ_BUFFER: { if (arcmsr_iop_message_xfer(acb, cmd)) cmd->result = (DID_ERROR << 16); cmd->scsi_done(cmd); } break; default: cmd->scsi_done(cmd); } } static int arcmsr_queue_command(struct scsi_cmnd *cmd, void (* done)(struct scsi_cmnd *)) { struct Scsi_Host *host = cmd->device->host; struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; struct CommandControlBlock *ccb; int target = cmd->device->id; int lun = cmd->device->lun; uint8_t scsicmd = cmd->cmnd[0]; cmd->scsi_done = done; cmd->host_scribble = NULL; cmd->result = 0; if((scsicmd == SYNCHRONIZE_CACHE) ||(scsicmd == SEND_DIAGNOSTIC)){ if(acb->devstate[target][lun] == ARECA_RAID_GONE) { cmd->result = (DID_NO_CONNECT << 16); } cmd->scsi_done(cmd); return 0; } if(target == 16){ /* virtual device for iop message transfer */ arcmsr_handle_virtual_command(acb, cmd); return 0; } if(atomic_read(&acb->ccboutstandingcount) >= ARCMSR_MAX_OUTSTANDING_CMD) return SCSI_MLQUEUE_HOST_BUSY; ccb = arcmsr_get_freeccb(acb); if(!ccb) return SCSI_MLQUEUE_HOST_BUSY; if(arcmsr_build_ccb( acb, ccb, cmd ) == FAILED){ cmd->result = (DID_ERROR << 16) | (RESERVATION_CONFLICT << 1); cmd->scsi_done(cmd); return 0; } arcmsr_post_ccb(acb, ccb); return 0; } static bool arcmsr_get_hba_config(struct AdapterControlBlock *acb){ struct MessageUnit_A __iomem *reg = acb->pmuA; char *acb_firm_model = acb->firm_model; char *acb_firm_version = acb->firm_version; char *acb_device_map = acb->device_map; char __iomem *iop_firm_model = (char __iomem *)(®->message_rwbuffer[15]); char __iomem *iop_firm_version = (char __iomem *)(®->message_rwbuffer[17]); char __iomem *iop_device_map = (char __iomem *) (®->message_rwbuffer[21]); int count; writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); if (!arcmsr_hba_wait_msgint_ready(acb)) { printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ miscellaneous data' timeout \n", acb->host->host_no); return false; } count = 8; while (count){ *acb_firm_model = readb(iop_firm_model); acb_firm_model++; iop_firm_model++; count--; } count = 16; while (count){ *acb_firm_version = readb(iop_firm_version); acb_firm_version++; iop_firm_version++; count--; } count=16; while(count){ *acb_device_map=readb(iop_device_map); acb_device_map++; iop_device_map++; count--; } printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n", acb->host->host_no, acb->firm_version, acb->firm_model); acb->signature = readl(®->message_rwbuffer[0]); acb->firm_request_len = readl(®->message_rwbuffer[1]); acb->firm_numbers_queue = readl(®->message_rwbuffer[2]); acb->firm_sdram_size = readl(®->message_rwbuffer[3]); acb->firm_hd_channels = readl(®->message_rwbuffer[4]); acb->firm_cfg_version = readl(®->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/ return true; } static bool arcmsr_get_hbb_config(struct AdapterControlBlock *acb) { struct MessageUnit_B *reg = acb->pmuB; struct pci_dev *pdev = acb->pdev; void *dma_coherent; dma_addr_t dma_coherent_handle; char *acb_firm_model = acb->firm_model; char *acb_firm_version = acb->firm_version; char *acb_device_map = acb->device_map; char __iomem *iop_firm_model; /*firm_model,15,60-67*/ char __iomem *iop_firm_version; /*firm_version,17,68-83*/ char __iomem *iop_device_map; /*firm_version,21,84-99*/ int count; dma_coherent = dma_alloc_coherent(&pdev->dev, sizeof(struct MessageUnit_B), &dma_coherent_handle, GFP_KERNEL); if (!dma_coherent){ printk("arcmsr%d: dma_alloc_coherent got error for hbb mu\n", acb->host->host_no); return false; } acb->dma_coherent_handle_hbb_mu = dma_coherent_handle; reg = (struct MessageUnit_B *)dma_coherent; acb->pmuB = reg; reg->drv2iop_doorbell= (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL); reg->drv2iop_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL_MASK); reg->iop2drv_doorbell = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL); reg->iop2drv_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL_MASK); reg->message_wbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_WBUFFER); reg->message_rbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RBUFFER); reg->message_rwbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RWBUFFER); iop_firm_model = (char __iomem *)(®->message_rwbuffer[15]); /*firm_model,15,60-67*/ iop_firm_version = (char __iomem *)(®->message_rwbuffer[17]); /*firm_version,17,68-83*/ iop_device_map = (char __iomem *)(®->message_rwbuffer[21]); /*firm_version,21,84-99*/ writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell); if (!arcmsr_hbb_wait_msgint_ready(acb)){ printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ miscellaneous data' timeout \n", acb->host->host_no); return false; } count = 8; while (count){ *acb_firm_model = readb(iop_firm_model); acb_firm_model++; iop_firm_model++; count--; } count = 16; while (count){ *acb_firm_version = readb(iop_firm_version); acb_firm_version++; iop_firm_version++; count--; } count=16; while(count){ *acb_device_map=readb(iop_device_map); acb_device_map++; iop_device_map++; count--; } printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n", acb->host->host_no, acb->firm_version, acb->firm_model); acb->signature = readl(®->message_rwbuffer[1]); /*firm_signature,1,00-03*/ acb->firm_request_len=readl(®->message_rwbuffer[2]); /*firm_request_len,1,04-07*/ acb->firm_numbers_queue=readl(®->message_rwbuffer[3]); /*firm_numbers_queue,2,08-11*/ acb->firm_sdram_size=readl(®->message_rwbuffer[4]); /*firm_sdram_size,3,12-15*/ acb->firm_hd_channels=readl(®->message_rwbuffer[5]); /*firm_ide_channels,4,16-19*/ acb->firm_cfg_version=readl(®->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/ /*firm_ide_channels,4,16-19*/ return true; } static bool arcmsr_get_hbc_config(struct AdapterControlBlock *pACB) { uint32_t intmask_org, Index, firmware_state = 0; struct MessageUnit_C *reg = pACB->pmuC; char *acb_firm_model = pACB->firm_model; char *acb_firm_version= pACB->firm_version; char *iop_firm_model = (char *)(®->msgcode_rwbuffer[15]); /*firm_model,15,60-67*/ char *iop_firm_version = (char *)(®->msgcode_rwbuffer[17]); /*firm_version,17,68-83*/ int count; /* disable all outbound interrupt */ intmask_org = readl(®->host_int_mask); /* disable outbound message0 int */ writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, ®->host_int_mask); /* wait firmware ready */ do{ firmware_state = readl(®->outbound_msgaddr1); }while((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK)==0); /* post "get config" instruction */ writel(ARCMSR_INBOUND_MESG0_GET_CONFIG,®->inbound_msgaddr0); writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE,®->inbound_doorbell); /* wait message ready */ for(Index= 0; Index < 2000; Index++){ if(readl(®->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE){ writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, ®->outbound_doorbell_clear);/*clear interrupt*/ break; } udelay(10); }/*max 1 seconds*/ if(Index >= 2000){ printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ miscellaneous data' timeout \n", pACB->host->host_no); return false; } count=8; while(count){ *acb_firm_model = readb(iop_firm_model); acb_firm_model++; iop_firm_model++; count--; } count=16; while(count){ *acb_firm_version = readb(iop_firm_version); acb_firm_version++; iop_firm_version++; count--; } printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n", pACB->host->host_no, pACB->firm_version, pACB->firm_model); pACB->firm_request_len = readl(®->msgcode_rwbuffer[1]); /*firm_request_len,1,04-07*/ pACB->firm_numbers_queue = readl(®->msgcode_rwbuffer[2]); /*firm_numbers_queue,2,08-11*/ pACB->firm_sdram_size = readl(®->msgcode_rwbuffer[3]); /*firm_sdram_size,3,12-15*/ pACB->firm_hd_channels = readl(®->msgcode_rwbuffer[4]); /*firm_ide_channels,4,16-19*/ pACB->firm_cfg_version = readl(®->msgcode_rwbuffer[25]); /*firm_cfg_version,25,100-103*/ /*all interrupt service will be enable at arcmsr_iop_init*/ return true; } static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb) { if(acb->adapter_type == ACB_ADAPTER_TYPE_A) return arcmsr_get_hba_config(acb); else if(acb->adapter_type == ACB_ADAPTER_TYPE_B) return arcmsr_get_hbb_config(acb); else return arcmsr_get_hbc_config(acb); } static int arcmsr_polling_hba_ccbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_ccb) { struct MessageUnit_A __iomem *reg = acb->pmuA; struct CommandControlBlock *ccb; struct ARCMSR_CDB *arcmsr_cdb; uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0; int rtn; bool error; polling_hba_ccb_retry: poll_count++; outbound_intstatus = readl(®->outbound_intstatus) & acb->outbound_int_enable; writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/ while (1) { if ((flag_ccb = readl(®->outbound_queueport)) == 0xFFFFFFFF) { if (poll_ccb_done){ rtn = SUCCESS; break; }else { msleep(25); if (poll_count > 100){ rtn = FAILED; break; } goto polling_hba_ccb_retry; } } arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5)); ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); poll_ccb_done = (ccb == poll_ccb) ? 1:0; if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) { printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" " poll command abort successfully \n" , acb->host->host_no , ccb->pcmd->device->id , ccb->pcmd->device->lun , ccb); ccb->pcmd->result = DID_ABORT << 16; arcmsr_ccb_complete(ccb); continue; } printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" " command done ccb = '0x%p'" "ccboutstandingcount = %d \n" , acb->host->host_no , ccb , atomic_read(&acb->ccboutstandingcount)); continue; } error=(flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0)?TRUE:FALSE; arcmsr_report_ccb_state(acb, ccb, error); } return rtn; } static int arcmsr_polling_hbb_ccbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_ccb) { struct MessageUnit_B *reg = acb->pmuB; struct ARCMSR_CDB *arcmsr_cdb; struct CommandControlBlock *ccb; uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0; int index, rtn; bool error; polling_hbb_ccb_retry: poll_count++; /* clear doorbell interrupt */ writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); while(1){ index = reg->doneq_index; if ((flag_ccb = readl(®->done_qbuffer[index])) == 0) { if (poll_ccb_done){ rtn = SUCCESS; break; }else { msleep(25); if (poll_count > 100){ rtn = FAILED; break; } goto polling_hbb_ccb_retry; } } writel(0, ®->done_qbuffer[index]); index++; /*if last index number set it to 0 */ index %= ARCMSR_MAX_HBB_POSTQUEUE; reg->doneq_index = index; /* check if command done with no error*/ arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5)); ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); poll_ccb_done = (ccb == poll_ccb) ? 1:0; if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) { printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" " poll command abort successfully \n" ,acb->host->host_no ,ccb->pcmd->device->id ,ccb->pcmd->device->lun ,ccb); ccb->pcmd->result = DID_ABORT << 16; arcmsr_ccb_complete(ccb); continue; } printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" " command done ccb = '0x%p'" "ccboutstandingcount = %d \n" , acb->host->host_no , ccb , atomic_read(&acb->ccboutstandingcount)); continue; } error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0)?TRUE:FALSE; arcmsr_report_ccb_state(acb, ccb, error); } return rtn; } static int arcmsr_polling_hbc_ccbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_ccb) { struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; uint32_t flag_ccb, ccb_cdb_phy; struct ARCMSR_CDB *arcmsr_cdb; bool error; struct CommandControlBlock *pCCB; uint32_t poll_ccb_done = 0, poll_count = 0; int rtn; polling_hbc_ccb_retry: poll_count++; while(1){ if((readl(®->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0){ if (poll_ccb_done){ rtn = SUCCESS; break; }else { msleep(25); if (poll_count > 100){ rtn = FAILED; break; } goto polling_hbc_ccb_retry; } } flag_ccb= readl(®->outbound_queueport_low); ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0); arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);/*frame must be 32 bytes aligned*/ pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); poll_ccb_done = (pCCB == poll_ccb) ? 1:0; /* check ifcommand done with no error*/ if((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)){ if(pCCB->startdone == ARCMSR_CCB_ABORTED){ printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" " poll command abort successfully \n" ,acb->host->host_no ,pCCB->pcmd->device->id ,pCCB->pcmd->device->lun ,pCCB); pCCB->pcmd->result = DID_ABORT << 16; arcmsr_ccb_complete(pCCB); continue; } printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" " command done ccb = '0x%p'" "ccboutstandingcount = %d \n" , acb->host->host_no , pCCB , atomic_read(&acb->ccboutstandingcount)); continue; } error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)?TRUE : FALSE; arcmsr_report_ccb_state(acb, pCCB, error); } return rtn; } static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_ccb) { int rtn = 0; switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { rtn = arcmsr_polling_hba_ccbdone(acb,poll_ccb); } break; case ACB_ADAPTER_TYPE_B: { rtn = arcmsr_polling_hbb_ccbdone(acb,poll_ccb); } break; case ACB_ADAPTER_TYPE_C: { rtn = arcmsr_polling_hbc_ccbdone(acb,poll_ccb); } } return rtn; } static int arcmsr_iop_confirm(struct AdapterControlBlock *acb) { uint32_t cdb_phyaddr, cdb_phyaddr_hi32; dma_addr_t dma_coherent_handle; /* ******************************************************************** ** here we need to tell iop 331 our freeccb.HighPart ** if freeccb.HighPart is not zero ******************************************************************** */ dma_coherent_handle = acb->dma_coherent_handle; cdb_phyaddr = (uint32_t)(dma_coherent_handle); cdb_phyaddr_hi32 = (uint32_t)((cdb_phyaddr >> 16) >> 16); acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32; /* *********************************************************************** ** if adapter type B, set window of "post command Q" *********************************************************************** */ switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { if (cdb_phyaddr_hi32 != 0) { struct MessageUnit_A __iomem *reg = acb->pmuA; uint32_t intmask_org; intmask_org = arcmsr_disable_outbound_ints(acb); writel(ARCMSR_SIGNATURE_SET_CONFIG, \ ®->message_rwbuffer[0]); writel(cdb_phyaddr_hi32, ®->message_rwbuffer[1]); writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \ ®->inbound_msgaddr0); if (!arcmsr_hba_wait_msgint_ready(acb)) { printk(KERN_NOTICE "arcmsr%d: ""set ccb high \ part physical address timeout\n", acb->host->host_no); return 1; } arcmsr_enable_outbound_ints(acb, intmask_org); } } break; case ACB_ADAPTER_TYPE_B: { unsigned long post_queue_phyaddr; uint32_t __iomem *rwbuffer; struct MessageUnit_B *reg = acb->pmuB; uint32_t intmask_org; intmask_org = arcmsr_disable_outbound_ints(acb); reg->postq_index = 0; reg->doneq_index = 0; writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell); if (!arcmsr_hbb_wait_msgint_ready(acb)) { printk(KERN_NOTICE "arcmsr%d:can not set diver mode\n", \ acb->host->host_no); return 1; } post_queue_phyaddr = acb->dma_coherent_handle_hbb_mu; rwbuffer = reg->message_rwbuffer; /* driver "set config" signature */ writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++); /* normal should be zero */ writel(cdb_phyaddr_hi32, rwbuffer++); /* postQ size (256 + 8)*4 */ writel(post_queue_phyaddr, rwbuffer++); /* doneQ size (256 + 8)*4 */ writel(post_queue_phyaddr + 1056, rwbuffer++); /* ccb maxQ size must be --> [(256 + 8)*4]*/ writel(1056, rwbuffer); writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell); if (!arcmsr_hbb_wait_msgint_ready(acb)) { printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \ timeout \n",acb->host->host_no); return 1; } arcmsr_hbb_enable_driver_mode(acb); arcmsr_enable_outbound_ints(acb, intmask_org); } break; case ACB_ADAPTER_TYPE_C: { if(cdb_phyaddr_hi32!=0){ struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; if(cdb_phyaddr_hi32!=0){ unsigned char Retries=0x00; do{ printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x \n", acb->adapter_index, cdb_phyaddr_hi32); } while(Retries++ < 100); } writel(ARCMSR_SIGNATURE_SET_CONFIG, ®->msgcode_rwbuffer[0]); writel(cdb_phyaddr_hi32, ®->msgcode_rwbuffer[1]); writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, ®->inbound_msgaddr0); writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); if(!arcmsr_hbc_wait_msgint_ready(acb)){ printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \ timeout \n",acb->host->host_no); return 1; } } } } return 0; } static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb) { uint32_t firmware_state = 0; switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { struct MessageUnit_A __iomem *reg = acb->pmuA; do { firmware_state = readl(®->outbound_msgaddr1); } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0); } break; case ACB_ADAPTER_TYPE_B: { struct MessageUnit_B *reg = acb->pmuB; do { firmware_state = readl(reg->iop2drv_doorbell); } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0); writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell); } break; case ACB_ADAPTER_TYPE_C: { struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; do{ firmware_state = readl(®->outbound_msgaddr1); }while((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK)==0); } } } #if ARCMSR_FW_POLLING static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb) { struct MessageUnit_A __iomem *reg = acb->pmuA; if(unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){ return; }else{ acb->fw_flag = FW_NORMAL; if(atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)){ atomic_set(&acb->rq_map_token,16); } atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); if(atomic_dec_and_test(&acb->rq_map_token)) return; writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ)); } return; } static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb) { struct MessageUnit_B __iomem *reg = acb->pmuB; if(unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){ return; }else{ acb->fw_flag = FW_NORMAL; if(atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)){ atomic_set(&acb->rq_map_token,16); } atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); if(atomic_dec_and_test(&acb->rq_map_token)) return; writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell); mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ)); } return; } static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb) { struct MessageUnit_C __iomem *reg = acb->pmuC; if(unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){ return; }else{ acb->fw_flag = FW_NORMAL; if(atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)){ atomic_set(&acb->rq_map_token,16); } atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); if(atomic_dec_and_test(&acb->rq_map_token)) return; writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ)); } return; } static void arcmsr_request_device_map(unsigned long pacb) { struct AdapterControlBlock *acb = (struct AdapterControlBlock *)pacb; switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { arcmsr_request_hba_device_map(acb); } break; case ACB_ADAPTER_TYPE_B: { arcmsr_request_hbb_device_map(acb); } break; case ACB_ADAPTER_TYPE_C: { arcmsr_request_hbc_device_map(acb); } } } #endif static void arcmsr_start_hba_bgrb(struct AdapterControlBlock *acb) { struct MessageUnit_A __iomem *reg = acb->pmuA; acb->acb_flags |= ACB_F_MSG_START_BGRB; writel(ARCMSR_INBOUND_MESG0_START_BGRB, ®->inbound_msgaddr0); if (!arcmsr_hba_wait_msgint_ready(acb)) { printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ rebulid' timeout \n", acb->host->host_no); } } static void arcmsr_start_hbb_bgrb(struct AdapterControlBlock *acb) { struct MessageUnit_B *reg = acb->pmuB; acb->acb_flags |= ACB_F_MSG_START_BGRB; writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell); if (!arcmsr_hbb_wait_msgint_ready(acb)) { printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ rebulid' timeout \n",acb->host->host_no); } } static void arcmsr_start_hbc_bgrb(struct AdapterControlBlock *pACB) { struct MessageUnit_C *phbcmu=(struct MessageUnit_C *)pACB->pmuC; pACB->acb_flags |= ACB_F_MSG_START_BGRB; writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0); writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell); if(!arcmsr_hbc_wait_msgint_ready(pACB)){ printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ rebulid' timeout \n",pACB->host->host_no); } return; } static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb) { switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: arcmsr_start_hba_bgrb(acb); break; case ACB_ADAPTER_TYPE_B: arcmsr_start_hbb_bgrb(acb); break; case ACB_ADAPTER_TYPE_C: arcmsr_start_hbc_bgrb(acb); } } static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb) { switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { struct MessageUnit_A __iomem *reg = acb->pmuA; uint32_t outbound_doorbell; /* empty doorbell Qbuffer if door bell ringed */ outbound_doorbell = readl(®->outbound_doorbell); /*clear doorbell interrupt */ writel(outbound_doorbell, ®->outbound_doorbell); writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); } break; case ACB_ADAPTER_TYPE_B: { struct MessageUnit_B *reg = acb->pmuB; /*clear interrupt and message state*/ writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell); /* let IOP know data has been read */ } break; case ACB_ADAPTER_TYPE_C: { struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; uint32_t outbound_doorbell; /* empty doorbell Qbuffer if door bell ringed */ outbound_doorbell = readl(®->outbound_doorbell); writel(outbound_doorbell, ®->outbound_doorbell_clear); writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell); } } } static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb) { switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: return; case ACB_ADAPTER_TYPE_B: { struct MessageUnit_B *reg = acb->pmuB; writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell); if(!arcmsr_hbb_wait_msgint_ready(acb)) { printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT"); return; } } break; case ACB_ADAPTER_TYPE_C: return; } return; } static void arcmsr_hardware_reset(struct AdapterControlBlock *acb) { uint8_t value[64]; int i, count = 0; struct MessageUnit_A __iomem *pmuA = acb->pmuA; struct MessageUnit_C __iomem *pmuC = acb->pmuC; u32 temp = 0; /* backup pci config data */ printk("arcmsr%d: executing hw bus reset .....\n", acb->host->host_no); for (i=0; i<64; i++) { pci_read_config_byte(acb->pdev, i, &value[i]); } /* hardware reset signal */ if((acb->dev_id == 0x1680)){ writel(ARCMSR_ARC1680_BUS_RESET, &pmuA->reserved1[0]); }else if((acb->dev_id == 0x1880)){ do{ count++; writel(0xF, &pmuC->write_sequence); writel(0x4, &pmuC->write_sequence); writel(0xB, &pmuC->write_sequence); writel(0x2, &pmuC->write_sequence); writel(0x7, &pmuC->write_sequence); writel(0xD, &pmuC->write_sequence); }while((((temp = readl(&pmuC->host_diagnostic)) | ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5)); writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic); }else{ pci_write_config_byte(acb->pdev, 0x84, 0x20); } msleep(2000); /* write back pci config data */ for (i=0;i<64;i++) { pci_write_config_byte(acb->pdev, i, value[i]); } msleep(1000); return; } static void arcmsr_iop_init(struct AdapterControlBlock *acb) { uint32_t intmask_org; /* disable all outbound interrupt */ intmask_org = arcmsr_disable_outbound_ints(acb); arcmsr_wait_firmware_ready(acb); arcmsr_iop_confirm(acb); /*start background rebuild*/ arcmsr_start_adapter_bgrb(acb); /* empty doorbell Qbuffer if door bell ringed */ arcmsr_clear_doorbell_queue_buffer(acb); arcmsr_enable_eoi_mode(acb); /* enable outbound Post Queue,outbound doorbell Interrupt */ arcmsr_enable_outbound_ints(acb, intmask_org); acb->acb_flags |= ACB_F_IOP_INITED; } static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb) { struct CommandControlBlock *ccb; uint32_t intmask_org; uint8_t rtnval = 0x00; int i = 0; vmk_WarningMessage("%s:\n", __FUNCTION__); //spin_unlock_irq(acb->host->host_lock); if (atomic_read(&acb->ccboutstandingcount) != 0) { /* disable all outbound interrupt */ intmask_org = arcmsr_disable_outbound_ints(acb); /* talk to iop 331 outstanding command aborted */ rtnval = arcmsr_abort_allcmd(acb); /* clear all outbound posted Q */ arcmsr_done4abort_postqueue(acb); for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { ccb = acb->pccb_pool[i]; if (ccb->startdone == ARCMSR_CCB_START) { arcmsr_ccb_complete(ccb); } } atomic_set(&acb->ccboutstandingcount, 0); /* enable all outbound interrupt */ arcmsr_enable_outbound_ints(acb, intmask_org); //spin_lock_irq(acb->host->host_lock); vmk_WarningMessage("%s:No.1 leaving\n", __FUNCTION__); return rtnval; } //spin_lock_irq(acb->host->host_lock); vmk_WarningMessage("%s:No.2 leaving\n", __FUNCTION__); return rtnval; } static int arcmsr_bus_reset(struct scsi_cmnd *cmd) { struct AdapterControlBlock *acb; int rtn = FAILED; int retry=0; vmk_WarningMessage("%s:\n", __FUNCTION__); acb=(struct AdapterControlBlock *) cmd->device->host->hostdata; acb->acb_flags |= ACB_F_BUS_RESET; acb->num_resets++; while(atomic_read(&acb->ccboutstandingcount) != 0 && retry < 6) { arcmsr_interrupt(acb); retry++; } /*if (!arcmsr_iop_reset(acb)) { rtn = FAILED; } else { rtn = SUCCESS; } */ acb->acb_flags &= ~ACB_F_BUS_RESET; return SUCCESS; } static int arcmsr_device_reset(struct scsi_cmnd *cmd) { return SUCCESS; } static int arcmsr_abort_one_cmd(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb) { int rtn; //spin_unlock_irq(acb->host->host_lock); //spin_lock_irq(&acb->eh_lock); rtn = arcmsr_polling_ccbdone(acb, ccb); //spin_unlock_irq(&acb->eh_lock); //spin_lock_irq(acb->host->host_lock); return rtn; } static int arcmsr_abort(struct scsi_cmnd *cmd) { struct AdapterControlBlock *acb = (struct AdapterControlBlock *)cmd->device->host->hostdata; int i = 0; int rtn = FAILED; vmk_WarningMessage("arcmsr%d: abort device command(0x%x) of scsi id = %d lun = %d \n", acb->host->host_no, cmd, cmd->device->id, cmd->device->lun); acb->acb_flags |= ACB_F_ABORT; acb->num_aborts++; /* ************************************************ ** the all interrupt service routine is locked ** we need to handle it as soon as possible and exit ************************************************ */ if (!atomic_read(&acb->ccboutstandingcount)) return rtn; for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { struct CommandControlBlock *ccb = acb->pccb_pool[i]; if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) { ccb->startdone = ARCMSR_CCB_ABORTED; rtn = arcmsr_abort_one_cmd(acb, ccb); break; } } acb->acb_flags &= ~ACB_F_ABORT; return rtn; } static const char *arcmsr_info(struct Scsi_Host *host) { struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; static char buf[256]; char *type; int raid6 = 1; switch (acb->pdev->device) { case PCI_DEVICE_ID_ARECA_1110: case PCI_DEVICE_ID_ARECA_1200: case PCI_DEVICE_ID_ARECA_1202: case PCI_DEVICE_ID_ARECA_1210: raid6 = 0; /*FALLTHRU*/ case PCI_DEVICE_ID_ARECA_1120: case PCI_DEVICE_ID_ARECA_1130: case PCI_DEVICE_ID_ARECA_1160: case PCI_DEVICE_ID_ARECA_1170: case PCI_DEVICE_ID_ARECA_1201: case PCI_DEVICE_ID_ARECA_1220: case PCI_DEVICE_ID_ARECA_1230: case PCI_DEVICE_ID_ARECA_1260: case PCI_DEVICE_ID_ARECA_1270: case PCI_DEVICE_ID_ARECA_1280: type = "SATA"; break; case PCI_DEVICE_ID_ARECA_1680: case PCI_DEVICE_ID_ARECA_1681: case PCI_DEVICE_ID_ARECA_1880: type = "SAS"; break; default: type = "X-TYPE"; break; } sprintf(buf, "Areca %s Host Adapter RAID Controller%s\n %s", type, raid6 ? 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Φm2TtNe$MՕ#ߥQcSDK-Ka}ǣ5qbO]YKÒDoGIS.&5 {jg/jɘyW|r⮀,WNOrJM<U7TY-k}\SG7,m>+h/dٿk:>"SZNdȹ0h.;ȧz;U02%ΔB7u5 Uggjۖ3>{|i_˅/0㥮)z䝱JͭsQͪZ6]B-6vPW],CK (U.Z0jȓ~'+ޗ ]JOqmQ:*LU?r~QzȉRQ<Wb7\b#spO:Ay3xTjf>myĢP_Opɒ(oYԏqnԍxn5^}Ob1s΁븱g/I|u=|b0TmO"P8dA9kIo]FFM_)7|Xs#wmx>?2t:E4dwXvQg0Mv'3Ag(_}:#n˝Q4ϯVJ/OknΡ/O+Z/^N}#A*Q2iHwN,ҷw,ȋ|I/mAmѕ!TIL5ƒ.P*ql׫Gn(hye 6;x'mj$ _-䍻'<"]`!%T@Z#WOaM7֏hsOܜ89uJj_DPAgw8M~NsIB4*6&}:m`5eV ]*ZM|Ť)> =W ;M)>*C+qXՈWfkiU M ʧb\Cy+}YGq튮%Z{-dU'rNs jIYu(t)S܌褥dC>$mEX\0p#u VK9H=2`Iku !"7eZ_A6kZUgD#؞/ B)6sSה)a4Q/OK?}.j팵묉ٴK^;͓5O)2vdWa{a롫w0+P)֤7Y?cnbDrV<"@f͞zV&6 /޶wuz{[Zi?8Lq}jYU$efjhCୀ3'-Xwʦj^I\8"A:i[USodAG8|YT_O^G)I tS'ۦUN5'?w8, 6^H#p!"AC?dOlQ$N{EQ>4{SX\U?|Ryyl}ʂT߳p +)}CUW| ^wTvВsk {ZEhSU'"45oIdܼjī-*=J \lMM,lL lZ/ovPK <A1.20.00.15_100202/PK`<<  01.20.00.15_100202/README.txtPKSummary tab-->Enter Maintanence Mode) 5). Launch VMware vSphere CLI. 6). key in "cd bin" on VMware vSphere CLI. 7). key in "perl vihostupdate.pl -server ESXi_4.X_IP_address -username root -password "root's password" -b CD/DVD_ROM_directory:\offline-bundle\ARC-arcmsr-1.20.00.15.vmk.100202-offline_bundle-262812.zip --nosigcheck -i" on VMware vSphere CLI 8). After loading Areca driver is finished, close VMware vSphere CLI. 9). Set the ESXi 4.X server as "maintenance mode" through VMware Vsphere Client. 10). Reboot ESXi 4.X server. 11). As the ESXi 4.X server comes back, you should see the storage device(s) on the ESXi 4.X server through VMware vSphere Client.ESX_ESXi_4.1/1.20.00.15_100202/vmware-esx-drivers-scsi-arcmsr_400.1.20.00.15.vmk.100202-1.0.4.00000.262812.iso0000755000000000000000000233000011024545 2 0ustar CD001LINUX CDROM 66@@"n' MKISOFS ISO 9660/HFS FILESYSTEM BUILDER & CDRECORD CD-R/DVD CREATOR (C) 1993 E.YOUNGDALE (C) 1997 J.PEARSON/J.SCHILLING 2010052716203900201005271620390000000000000000002010052716203900 CD001LINUX CDROM 66%/E``"##n' MKISOFS ISO 9660_HFS FILESYSTEM BUILDER & CDRECORD CD-R_DVD CREA 2010052716203900201005271620390000000000000000002010052716203900 CD001MKI Thu May 27 16:20:39 2010 mkisofs 2.01 -o .../vmware-esx-drivers-scsi-arcmsr_400.1.20.00.15.vmk.100202-1.0.4.00000.262812.iso -m .../.. -R -J -T .../isoDOC"OFFLINE_SOURCE!_RPMDOC"OFFLINE_SOURCE!_RPM#&.rpm%doc'offline-bundle $source#&.rpm%doc'offline-bundle $sourcen'SPRRPX$AATFn'n'n'CE((fn'RRPX$TFn'n'n'pn'DOCRRNMdocPX$AATFn'n'n'))44n' DRIVERS.XML;1RRNMdrivers.xmlPX$TFn'n'n'""n'OFFLINE_RRNMoffline-bundlePX$AATFn'n'n'vn'SOURCERRNM sourcePX$AATFn'n'n'~**JJn' TRANS.TBL;1RRNMTRANS.TBLPX$$$TFn'n'n'r!!n'_RPMRRNM .rpmPX$AATFn'n'n'fn'RRPX$AATFn'n'n'fn'RRPX$AATFn'n'n'++XXn'DRIVER_S.TAR;1RRNM[driver-source-vmware-esx-drivers-scsi-arcmsr_400.1.20.00.15.vmk.100202-1.0.4.00000.tarPX$CE~vv**n' TRANS.TBL;1RRNMTRANS.TBLPX$$$TFn'n'n'TFn'n'n'fn'RRPX$AATFn'n'n'fn'RRPX$AATFn'n'n'ww ZZ n'OPEN_SOU.TXT;1RRNMbopen_source_licenses_vmware-esx-drivers-scsi-arcmsr_400.1.20.00.15.vmk.100202-1.0.4.00000.txtPX$$$CE  n' README.TXT;1RRNMREADME.txtPX$$$TFn'n'n'~n' TRANS.TBL;1RRNMTRANS.TBLPX$$$TFn'n'n'TFn'n'n'f!!n'RRPX$AATFn'n'n'fn'RRPX$AATFn'n'n'~##n' TRANS.TBL;1RRNMTRANS.TBLPX$$$TFn'n'n'RRn'VMWARE_E.RPM;1RRNMTvmware-esx-drivers-scsi-arcmsr-400.1.20.00.15.vmk.100202-1.0.4.00000.x86_64.rpmPX$TFn'n'n'f""n'RRPX$AATFn'n'n'fn'RRPX$AATFn'n'n'3bb3n'ARC_ARCM.ZIP;1RRNM?ARC-arcmsr-1.20.00.15.vmk.100202-offline_bundle-262812.zipPX$TFn'n'n'~n' TRANS.TBL;1RRNMTRANS.TBLPX$$$TFn'n'n'"##n'"##n'*&&n'.rpm4**JJn'TRANS.TBL(%%n'doc8))44n'drivers.xml>''n'offline-bundle.$$n' source"$$n'"##n'4vv**n'TRANS.TBL++XXn'driver-source-vmware-esx-drivers-scsi-arcmsr_400.1.20.00.15.vmk."%%n'"##n'6 n'README.txt4n'TRANS.TBLww ZZ n'open_source_licenses_vmware-esx-drivers-scsi-arcmsr_400.1.20.00."&&n'"##n'4##n'TRANS.TBLRRn'vmware-esx-drivers-scsi-arcmsr-400.1.20.00.15.vmk.100202-1.0.4.0"''n'"##n'3bb3n'tARC-arcmsr-1.20.00.15.vmk.100202-offline_bundle-262812.zip4n'TRANS.TBLER TRRIP_1991ATHE ROCK RIDGE INTERCHANGE PROTOCOL PROVIDES SUPPORT FOR POSIX FILE SYSTEM SEMANTICSPLEASE CONTACT DISC PUBLISHER FOR SPECIFICATION SOURCE. SEE PUBLISHER IDENTIFIER IN PRIMARY VOLUME DESCRIPTOR FOR CONTACT INFORMATION. vmware-esx-drivers-scsi-arcmsr 400.1.20.00.15.vmk.100202-1.0.4.00000 .rpm/vmware-esx-drivers-scsi-arcmsr-400.1.20.00.15.vmk.100202-1.0.4.00000.x86_64.rpm arcmsr: scsi driver for VMware ESX /usr/lib/vmware/vmkmod/arcmsr.o /etc/vmware/pciid/arcmsr.xml D DOC doc F DRIVERS.XML;1 drivers.xml D OFFLINE_ offline-bundle D SOURCE source D _RPM .rpm src/0000755000031100003110000000000011377577065010037 5ustar mtsmtssrc/Makefile0000444000031100003110000000303711377577065011500 0ustar mtsmts# File: arcmsr/Makefile # Makefile for the Areca ARC-11XX/12XX/16XX SAS/SATA RAID Controller # Copyright (C) 2009 - 2012 Areca Technology Corporation # # This program is free software; you can redistribute it and/or # modify it under the terms of the GNU General Public License # as published by the Free Software Foundation, version 2 # of the License. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # # Main targets: # all (the default) : make all # clean : clean files # install : make all + install # uninstall : uninstall # # Notes : # - install and uninstall must be made as root ifeq ($(KVER),) ifeq ($(KDIR),) KVER = $(shell uname -r) KDIR := /lib/modules/$(KVER)/build endif else KDIR := /lib/modules/$(KVER)/build endif MODULE_NAME = arcmsr INSTALL_DIR := /lib/modules/$(shell uname -r)/extra arcmsr-objs := arcmsr_attr.o arcmsr_hba.o obj-m := arcmsr.o EXTRA_CFLAGS += -g all: $(MAKE) -C $(KDIR) SUBDIRS=$(shell pwd) BUILD_INI=m install: all $(MAKE) -C $(KDIR) SUBDIRS=$(shell pwd) BUILD_INI=m modules_install -depmod -a $(KVER) uninstall: rm -f $(INSTALL_DIR)/$(MODULE_NAME).ko -/sbin/depmod -a $(KVER) rmmod $(MODULE_NAME) clean: rm -f *.o *.ko .*.cmd *.mod.c .*.d .depend *~ Modules.symvers Module.symvers Module.markers modules.order rm -rf .tmp_versions src/arcmsr.h0000444000031100003110000007611211377577065011504 0ustar mtsmts/* ******************************************************************************* ** O.S : Linux ** FILE NAME : arcmsr.h ** BY : Erich Chen ** Description: SCSI RAID Device Driver for ** ARECA RAID Host adapter ******************************************************************************* ** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved. ** ** Web site: www.areca.com.tw ** E-mail: support@areca.com.tw ** ** This program is free software; you can redistribute it and/or modify ** it under the terms of the GNU General Public License version 2 as ** published by the Free Software Foundation. ** This program is distributed in the hope that it will be useful, ** but WITHOUT ANY WARRANTY; without even the implied warranty of ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ** GNU General Public License for more details. ******************************************************************************* ** Redistribution and use in source and binary forms, with or without ** modification, are permitted provided that the following conditions ** are met: ** 1. Redistributions of source code must retain the above copyright ** notice, this list of conditions and the following disclaimer. ** 2. Redistributions in binary form must reproduce the above copyright ** notice, this list of conditions and the following disclaimer in the ** documentation and/or other materials provided with the distribution. ** 3. The name of the author may not be used to endorse or promote products ** derived from this software without specific prior written permission. ** ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, BUT ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT **(INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ******************************************************************************* */ #include struct device_attribute; /*The limit of outstanding scsi command that firmware can handle*/ #define ARCMSR_MAX_OUTSTANDING_CMD 256 #define ARCMSR_MAX_FREECCB_NUM 320 #define ARCMSR_DRIVER_VERSION "Driver Version 1.20.00.15.vmk.100202" #define ARCMSR_SCSI_INITIATOR_ID 255 #define ARCMSR_MAX_XFER_SECTORS 512 #define ARCMSR_MAX_XFER_SECTORS_B 4096 #define ARCMSR_MAX_XFER_SECTORS_C 304 #define ARCMSR_MAX_TARGETID 17 #define ARCMSR_MAX_TARGETLUN 8 #define ARCMSR_MAX_CMD_PERLUN ARCMSR_MAX_OUTSTANDING_CMD #define ARCMSR_MAX_QBUFFER 4096 #define ARCMSR_DEFAULT_SG_ENTRIES 38 #define ARCMSR_MAX_HBB_POSTQUEUE 264 #define ARCMSR_MAX_XFER_LEN 0x26000 /* 152K */ #define ARCMSR_CDB_SG_PAGE_LENGTH 256 #define SCSI_CMD_ARECA_SPECIFIC 0xE1 /* ********************************************************************************** ** ********************************************************************************** */ #define ARC_SUCCESS 0 #define ARC_FAILURE 1 /* ********************************************************************************** ** ********************************************************************************** */ #if defined(__VMKLNX__) typedef int bool; #ifndef bool #define true 1 #define false 0 #endif #endif /* ********************************************************************************** ** ********************************************************************************** */ #ifndef TRUE #define TRUE 1 #endif #ifndef FALSE #define FALSE 0 #endif /* ********************************************************************************** ** ********************************************************************************** */ #ifndef PCI_VENDOR_ID_ARECA #define PCI_VENDOR_ID_ARECA 0x17d3 /* Vendor ID */ #define PCI_DEVICE_ID_ARECA_1110 0x1110 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1120 0x1120 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1130 0x1130 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1160 0x1160 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1170 0x1170 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1200 0x1200 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1201 0x1201 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1202 0x1202 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1210 0x1210 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1220 0x1220 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1230 0x1230 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1260 0x1260 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1270 0x1270 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1280 0x1280 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1680 0x1680 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1681 0x1681 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1880 0x1880 /* Device ID */ #elif !defined(PCI_DEVICE_ID_ARECA_1200) #define PCI_DEVICE_ID_ARECA_1200 0x1200 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1201 0x1201 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1202 0x1202 /* Device ID */ #endif /* ******************************************************************************* ** split 64bits dma addressing ******************************************************************************* */ #define dma_addr_hi32(addr) (uint32_t) ((addr>>16)>>16) #define dma_addr_lo32(addr) (uint32_t) (addr & 0xffffffff) /* ******************************************************************************* ** MESSAGE CONTROL CODE ******************************************************************************* */ struct CMD_MESSAGE { uint32_t HeaderLength; uint8_t Signature[8]; uint32_t Timeout; uint32_t ControlCode; uint32_t ReturnCode; uint32_t Length; }; /* ******************************************************************************* ** IOP Message Transfer Data for user space ******************************************************************************* */ struct CMD_MESSAGE_FIELD { struct CMD_MESSAGE cmdmessage; uint8_t messagedatabuffer[1032]; }; /* IOP message transfer */ #define ARCMSR_MESSAGE_FAIL 0x0001 /* DeviceType */ #define ARECA_SATA_RAID 0x90000000 /* FunctionCode */ #define FUNCTION_READ_RQBUFFER 0x0801 #define FUNCTION_WRITE_WQBUFFER 0x0802 #define FUNCTION_CLEAR_RQBUFFER 0x0803 #define FUNCTION_CLEAR_WQBUFFER 0x0804 #define FUNCTION_CLEAR_ALLQBUFFER 0x0805 #define FUNCTION_RETURN_CODE_3F 0x0806 #define FUNCTION_SAY_HELLO 0x0807 #define FUNCTION_SAY_GOODBYE 0x0808 #define FUNCTION_FLUSH_ADAPTER_CACHE 0x0809 #define FUNCTION_GET_FIRMWARE_STATUS 0x080A #define FUNCTION_HARDWARE_RESET 0x080B /* ARECA IO CONTROL CODE*/ #define ARCMSR_MESSAGE_READ_RQBUFFER \ ARECA_SATA_RAID | FUNCTION_READ_RQBUFFER #define ARCMSR_MESSAGE_WRITE_WQBUFFER \ ARECA_SATA_RAID | FUNCTION_WRITE_WQBUFFER #define ARCMSR_MESSAGE_CLEAR_RQBUFFER \ ARECA_SATA_RAID | FUNCTION_CLEAR_RQBUFFER #define ARCMSR_MESSAGE_CLEAR_WQBUFFER \ ARECA_SATA_RAID | FUNCTION_CLEAR_WQBUFFER #define ARCMSR_MESSAGE_CLEAR_ALLQBUFFER \ ARECA_SATA_RAID | FUNCTION_CLEAR_ALLQBUFFER #define ARCMSR_MESSAGE_RETURN_CODE_3F \ ARECA_SATA_RAID | FUNCTION_RETURN_CODE_3F #define ARCMSR_MESSAGE_SAY_HELLO \ ARECA_SATA_RAID | FUNCTION_SAY_HELLO #define ARCMSR_MESSAGE_SAY_GOODBYE \ ARECA_SATA_RAID | FUNCTION_SAY_GOODBYE #define ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE \ ARECA_SATA_RAID | FUNCTION_FLUSH_ADAPTER_CACHE /* ARECA IOCTL ReturnCode */ #define ARCMSR_MESSAGE_RETURNCODE_OK 0x00000001 #define ARCMSR_MESSAGE_RETURNCODE_ERROR 0x00000006 #define ARCMSR_MESSAGE_RETURNCODE_3F 0x0000003F #define ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON 0x00000088 /* ************************************************************* ** structure for holding DMA address data ************************************************************* */ #define IS_DMA64 (sizeof(dma_addr_t) == 8) #define IS_SG64_ADDR 0x01000000 /* bit24 */ struct SG32ENTRY { __le32 length; __le32 address; }__attribute__ ((packed)); struct SG64ENTRY { __le32 length; __le32 address; __le32 addresshigh; }__attribute__ ((packed)); /* ******************************************************************** ** Q Buffer of IOP Message Transfer ******************************************************************** */ struct QBUFFER { uint32_t data_len; uint8_t data[124]; }; /* ******************************************************************************* ** FIRMWARE INFO for Intel IOP R 80331 processor (Type A) ******************************************************************************* */ struct FIRMWARE_INFO { uint32_t signature; /*0, 00-03*/ uint32_t request_len; /*1, 04-07*/ uint32_t numbers_queue; /*2, 08-11*/ uint32_t sdram_size; /*3, 12-15*/ uint32_t ide_channels; /*4, 16-19*/ char vendor[40]; /*5, 20-59*/ char model[8]; /*15, 60-67*/ char firmware_ver[16]; /*17, 68-83*/ char device_map[16]; /*21, 84-99*/ uint32_t cfgVersion; /*25,100-103 Added for checking of new firmware capability*/ uint8_t cfgSerial[16]; /*26,104-119*/ uint32_t cfgPicStatus; /*30,120-123*/ }; /* signature of set and get firmware config */ #define ARCMSR_SIGNATURE_GET_CONFIG 0x87974060 #define ARCMSR_SIGNATURE_SET_CONFIG 0x87974063 /* message code of inbound message register */ #define ARCMSR_INBOUND_MESG0_NOP 0x00000000 #define ARCMSR_INBOUND_MESG0_GET_CONFIG 0x00000001 #define ARCMSR_INBOUND_MESG0_SET_CONFIG 0x00000002 #define ARCMSR_INBOUND_MESG0_ABORT_CMD 0x00000003 #define ARCMSR_INBOUND_MESG0_STOP_BGRB 0x00000004 #define ARCMSR_INBOUND_MESG0_FLUSH_CACHE 0x00000005 #define ARCMSR_INBOUND_MESG0_START_BGRB 0x00000006 #define ARCMSR_INBOUND_MESG0_CHK331PENDING 0x00000007 #define ARCMSR_INBOUND_MESG0_SYNC_TIMER 0x00000008 /* doorbell interrupt generator */ #define ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK 0x00000001 #define ARCMSR_INBOUND_DRIVER_DATA_READ_OK 0x00000002 #define ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK 0x00000001 #define ARCMSR_OUTBOUND_IOP331_DATA_READ_OK 0x00000002 /* ccb areca cdb flag */ #define ARCMSR_CCBPOST_FLAG_SGL_BSIZE 0x80000000 #define ARCMSR_CCBPOST_FLAG_IAM_BIOS 0x40000000 #define ARCMSR_CCBREPLY_FLAG_IAM_BIOS 0x40000000 #define ARCMSR_CCBREPLY_FLAG_ERROR_MODE0 0x10000000 #define ARCMSR_CCBREPLY_FLAG_ERROR_MODE1 0x00000001 /* outbound firmware ok */ #define ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK 0x80000000 /* ARC-1680 Bus Reset*/ #define ARCMSR_ARC1680_BUS_RESET 0x00000003 /* ARC-1880 Bus Reset*/ #define ARCMSR_ARC1880_RESET_ADAPTER 0x00000024 #define ARCMSR_ARC1880_DiagWrite_ENABLE 0x00000080 /* ************************************************************************ ** SPEC. for Areca Type B adapter ************************************************************************ */ /* ARECA HBB COMMAND for its FIRMWARE */ /* window of "instruction flags" from driver to iop */ #define ARCMSR_DRV2IOP_DOORBELL 0x00020400 #define ARCMSR_DRV2IOP_DOORBELL_MASK 0x00020404 /* window of "instruction flags" from iop to driver */ #define ARCMSR_IOP2DRV_DOORBELL 0x00020408 #define ARCMSR_IOP2DRV_DOORBELL_MASK 0x0002040C /* ARECA FLAG LANGUAGE */ /* ioctl transfer */ #define ARCMSR_IOP2DRV_DATA_WRITE_OK 0x00000001 /* ioctl transfer */ #define ARCMSR_IOP2DRV_DATA_READ_OK 0x00000002 #define ARCMSR_IOP2DRV_CDB_DONE 0x00000004 #define ARCMSR_IOP2DRV_MESSAGE_CMD_DONE 0x00000008 #define ARCMSR_DOORBELL_HANDLE_INT 0x0000000F #define ARCMSR_DOORBELL_INT_CLEAR_PATTERN 0xFF00FFF0 #define ARCMSR_MESSAGE_INT_CLEAR_PATTERN 0xFF00FFF7 /* (ARCMSR_INBOUND_MESG0_GET_CONFIG<<16)|ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED) */ #define ARCMSR_MESSAGE_GET_CONFIG 0x00010008 /* (ARCMSR_INBOUND_MESG0_SET_CONFIG<<16)|ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED) */ #define ARCMSR_MESSAGE_SET_CONFIG 0x00020008 /* (ARCMSR_INBOUND_MESG0_ABORT_CMD<<16)|ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED) */ #define ARCMSR_MESSAGE_ABORT_CMD 0x00030008 /* (ARCMSR_INBOUND_MESG0_STOP_BGRB<<16)|ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED) */ #define ARCMSR_MESSAGE_STOP_BGRB 0x00040008 /* (ARCMSR_INBOUND_MESG0_FLUSH_CACHE<<16)|ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED) */ #define ARCMSR_MESSAGE_FLUSH_CACHE 0x00050008 /* (ARCMSR_INBOUND_MESG0_START_BGRB<<16)|ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED) */ #define ARCMSR_MESSAGE_START_BGRB 0x00060008 #define ARCMSR_MESSAGE_START_DRIVER_MODE 0x000E0008 #define ARCMSR_MESSAGE_SET_POST_WINDOW 0x000F0008 #define ARCMSR_MESSAGE_ACTIVE_EOI_MODE 0x00100008 /* ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK */ #define ARCMSR_MESSAGE_FIRMWARE_OK 0x80000000 /* ioctl transfer */ #define ARCMSR_DRV2IOP_DATA_WRITE_OK 0x00000001 /* ioctl transfer */ #define ARCMSR_DRV2IOP_DATA_READ_OK 0x00000002 #define ARCMSR_DRV2IOP_CDB_POSTED 0x00000004 #define ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED 0x00000008 #define ARCMSR_DRV2IOP_END_OF_INTERRUPT 0x00000010 /* data tunnel buffer between user space program and its firmware */ /* user space data to iop 128bytes */ #define ARCMSR_MESSAGE_WBUFFER 0x0000fe00 /* iop data to user space 128bytes */ #define ARCMSR_MESSAGE_RBUFFER 0x0000ff00 /* iop message_rwbuffer for message command */ #define ARCMSR_MESSAGE_RWBUFFER 0x0000fa00 /* ************************************************************************ ** SPEC. for Areca HBC adapter ************************************************************************ */ #define ARCMSR_HBC_ISR_THROTTLING_LEVEL 12 #define ARCMSR_HBC_ISR_MAX_DONE_QUEUE 20 /* Host Interrupt Mask */ #define ARCMSR_HBCMU_UTILITY_A_ISR_MASK 0x00000001 /* When clear, the Utility_A interrupt routes to the host.*/ #define ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK 0x00000004 /* When clear, the General Outbound Doorbell interrupt routes to the host.*/ #define ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK 0x00000008 /* When clear, the Outbound Post List FIFO Not Empty interrupt routes to the host.*/ #define ARCMSR_HBCMU_ALL_INTMASKENABLE 0x0000000D /* disable all ISR */ /* Host Interrupt Status */ #define ARCMSR_HBCMU_UTILITY_A_ISR 0x00000001 /* ** Set when the Utility_A Interrupt bit is set in the Outbound Doorbell Register. ** It clears by writing a 1 to the Utility_A bit in the Outbound Doorbell Clear Register or through automatic clearing (if enabled). */ #define ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR 0x00000004 /* ** Set if Outbound Doorbell register bits 30:1 have a non-zero ** value. This bit clears only when Outbound Doorbell bits ** 30:1 are ALL clear. Only a write to the Outbound Doorbell ** Clear register clears bits in the Outbound Doorbell register. */ #define ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR 0x00000008 /* ** Set whenever the Outbound Post List Producer/Consumer ** Register (FIFO) is not empty. It clears when the Outbound ** Post List FIFO is empty. */ #define ARCMSR_HBCMU_SAS_ALL_INT 0x00000010 /* ** This bit indicates a SAS interrupt from a source external to ** the PCIe core. This bit is not maskable. */ /* DoorBell*/ #define ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK 0x00000002 #define ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK 0x00000004 /*inbound message 0 ready*/ #define ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE 0x00000008 /*more than 12 request completed in a time*/ #define ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING 0x00000010 #define ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK 0x00000002 /*outbound DATA WRITE isr door bell clear*/ #define ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_DOORBELL_CLEAR 0x00000002 #define ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK 0x00000004 /*outbound DATA READ isr door bell clear*/ #define ARCMSR_HBCMU_IOP2DRV_DATA_READ_DOORBELL_CLEAR 0x00000004 /*outbound message 0 ready*/ #define ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE 0x00000008 /*outbound message cmd isr door bell clear*/ #define ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR 0x00000008 /*ARCMSR_HBAMU_MESSAGE_FIRMWARE_OK*/ #define ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK 0x80000000 /* ******************************************************************************* ** ARECA SCSI COMMAND DESCRIPTOR BLOCK size 0x1F8 (504) ******************************************************************************* */ struct ARCMSR_CDB { uint8_t Bus; uint8_t TargetID; uint8_t LUN; uint8_t Function; uint8_t CdbLength; uint8_t sgcount; uint8_t Flags; #define ARCMSR_CDB_FLAG_SGL_BSIZE 0x01 #define ARCMSR_CDB_FLAG_BIOS 0x02 #define ARCMSR_CDB_FLAG_WRITE 0x04 #define ARCMSR_CDB_FLAG_SIMPLEQ 0x00 #define ARCMSR_CDB_FLAG_HEADQ 0x08 #define ARCMSR_CDB_FLAG_ORDEREDQ 0x10 uint8_t msgPages; uint32_t Context; uint32_t DataLength; uint8_t Cdb[16]; uint8_t DeviceStatus; #define ARCMSR_DEV_CHECK_CONDITION 0x02 #define ARCMSR_DEV_SELECT_TIMEOUT 0xF0 #define ARCMSR_DEV_ABORTED 0xF1 #define ARCMSR_DEV_INIT_FAIL 0xF2 uint8_t SenseData[15]; union { struct SG32ENTRY sg32entry[1]; struct SG64ENTRY sg64entry[1]; } u; }; /* ******************************************************************************* ** Messaging Unit (MU) of the Intel R 80331 I/O processor(Type A) and Type B processor ******************************************************************************* */ struct MessageUnit_A { uint32_t resrved0[4]; /*0000 000F*/ uint32_t inbound_msgaddr0; /*0010 0013*/ uint32_t inbound_msgaddr1; /*0014 0017*/ uint32_t outbound_msgaddr0; /*0018 001B*/ uint32_t outbound_msgaddr1; /*001C 001F*/ uint32_t inbound_doorbell; /*0020 0023*/ uint32_t inbound_intstatus; /*0024 0027*/ uint32_t inbound_intmask; /*0028 002B*/ uint32_t outbound_doorbell; /*002C 002F*/ uint32_t outbound_intstatus; /*0030 0033*/ uint32_t outbound_intmask; /*0034 0037*/ uint32_t reserved1[2]; /*0038 003F*/ uint32_t inbound_queueport; /*0040 0043*/ uint32_t outbound_queueport; /*0044 0047*/ uint32_t reserved2[2]; /*0048 004F*/ uint32_t reserved3[492]; /*0050 07FF 492*/ uint32_t reserved4[128]; /*0800 09FF 128*/ uint32_t message_rwbuffer[256]; /*0a00 0DFF 256*/ uint32_t message_wbuffer[32]; /*0E00 0E7F 32*/ uint32_t reserved5[32]; /*0E80 0EFF 32*/ uint32_t message_rbuffer[32]; /*0F00 0F7F 32*/ uint32_t reserved6[32]; /*0F80 0FFF 32*/ }; struct MessageUnit_B { uint32_t post_qbuffer[ARCMSR_MAX_HBB_POSTQUEUE]; uint32_t done_qbuffer[ARCMSR_MAX_HBB_POSTQUEUE]; uint32_t postq_index; uint32_t doneq_index; uint32_t __iomem *drv2iop_doorbell; uint32_t __iomem *drv2iop_doorbell_mask; uint32_t __iomem *iop2drv_doorbell; uint32_t __iomem *iop2drv_doorbell_mask; uint32_t __iomem *message_rwbuffer; uint32_t __iomem *message_wbuffer; uint32_t __iomem *message_rbuffer; }; /* ********************************************************************* ** LSI ********************************************************************* */ struct MessageUnit_C { uint32_t message_unit_status; /*0000 0003*/ uint32_t slave_error_attribute; /*0004 0007*/ uint32_t slave_error_address; /*0008 000B*/ uint32_t posted_outbound_doorbell; /*000C 000F*/ uint32_t master_error_attribute; /*0010 0013*/ uint32_t master_error_address_low; /*0014 0017*/ uint32_t master_error_address_high; /*0018 001B*/ uint32_t hcb_size; /*001C 001F*/ uint32_t inbound_doorbell; /*0020 0023*/ uint32_t diagnostic_rw_data; /*0024 0027*/ uint32_t diagnostic_rw_address_low; /*0028 002B*/ uint32_t diagnostic_rw_address_high; /*002C 002F*/ uint32_t host_int_status; /*0030 0033*/ uint32_t host_int_mask; /*0034 0037*/ uint32_t dcr_data; /*0038 003B*/ uint32_t dcr_address; /*003C 003F*/ uint32_t inbound_queueport; /*0040 0043*/ uint32_t outbound_queueport; /*0044 0047*/ uint32_t hcb_pci_address_low; /*0048 004B*/ uint32_t hcb_pci_address_high; /*004C 004F*/ uint32_t iop_int_status; /*0050 0053*/ uint32_t iop_int_mask; /*0054 0057*/ uint32_t iop_inbound_queue_port; /*0058 005B*/ uint32_t iop_outbound_queue_port; /*005C 005F*/ uint32_t inbound_free_list_index; /*0060 0063*/ uint32_t inbound_post_list_index; /*0064 0067*/ uint32_t outbound_free_list_index; /*0068 006B*/ uint32_t outbound_post_list_index; /*006C 006F*/ uint32_t inbound_doorbell_clear; /*0070 0073*/ uint32_t i2o_message_unit_control; /*0074 0077*/ uint32_t last_used_message_source_address_low; /*0078 007B*/ uint32_t last_used_message_source_address_high; /*007C 007F*/ uint32_t pull_mode_data_byte_count[4]; /*0080 008F*/ uint32_t message_dest_address_index; /*0090 0093*/ uint32_t done_queue_not_empty_int_counter_timer; /*0094 0097*/ uint32_t utility_A_int_counter_timer; /*0098 009B*/ uint32_t outbound_doorbell; /*009C 009F*/ uint32_t outbound_doorbell_clear; /*00A0 00A3*/ uint32_t message_source_address_index; /*00A4 00A7*/ uint32_t message_done_queue_index; /*00A8 00AB*/ uint32_t reserved0; /*00AC 00AF*/ uint32_t inbound_msgaddr0; /*00B0 00B3*/ uint32_t inbound_msgaddr1; /*00B4 00B7*/ uint32_t outbound_msgaddr0; /*00B8 00BB*/ uint32_t outbound_msgaddr1; /*00BC 00BF*/ uint32_t inbound_queueport_low; /*00C0 00C3*/ uint32_t inbound_queueport_high; /*00C4 00C7*/ uint32_t outbound_queueport_low; /*00C8 00CB*/ uint32_t outbound_queueport_high; /*00CC 00CF*/ uint32_t iop_inbound_queue_port_low; /*00D0 00D3*/ uint32_t iop_inbound_queue_port_high; /*00D4 00D7*/ uint32_t iop_outbound_queue_port_low; /*00D8 00DB*/ uint32_t iop_outbound_queue_port_high; /*00DC 00DF*/ uint32_t message_dest_queue_port_low; /*00E0 00E3*/ uint32_t message_dest_queue_port_high; /*00E4 00E7*/ uint32_t last_used_message_dest_address_low; /*00E8 00EB*/ uint32_t last_used_message_dest_address_high; /*00EC 00EF*/ uint32_t message_done_queue_base_address_low; /*00F0 00F3*/ uint32_t message_done_queue_base_address_high; /*00F4 00F7*/ uint32_t host_diagnostic; /*00F8 00FB*/ uint32_t write_sequence; /*00FC 00FF*/ uint32_t reserved1[34]; /*0100 0187*/ uint32_t reserved2[1950]; /*0188 1FFF*/ uint32_t message_wbuffer[32]; /*2000 207F*/ uint32_t reserved3[32]; /*2080 20FF*/ uint32_t message_rbuffer[32]; /*2100 217F*/ uint32_t reserved4[32]; /*2180 21FF*/ uint32_t msgcode_rwbuffer[256]; /*2200 23FF*/ }; /* ******************************************************************************* ** Adapter Control Block ******************************************************************************* */ struct AdapterControlBlock { uint32_t adapter_type; /* adapter A,B..... */ #define ACB_ADAPTER_TYPE_A 0x00000001 /* hba I IOP */ #define ACB_ADAPTER_TYPE_B 0x00000002 /* hbb M IOP */ #define ACB_ADAPTER_TYPE_C 0x00000004 /* hbc P IOP */ #define ACB_ADAPTER_TYPE_D 0x00000008 /* hbd A IOP */ struct pci_dev * pdev; struct Scsi_Host * host; unsigned long vir2phy_offset; /* Offset is used in making arc cdb physical to virtual calculations */ uint32_t outbound_int_enable; uint32_t cdb_phyaddr_hi32; spinlock_t eh_lock; spinlock_t ccblist_lock; union { struct MessageUnit_A __iomem *pmuA; struct MessageUnit_B *pmuB; struct MessageUnit_C __iomem *pmuC; }; /* message unit ATU inbound base address0 */ void __iomem *mem_base0; void __iomem *mem_base1; uint32_t acb_flags; u16 dev_id; uint8_t adapter_index; #define ACB_F_SCSISTOPADAPTER 0x0001 #define ACB_F_MSG_STOP_BGRB 0x0002 /* stop RAID background rebuild */ #define ACB_F_MSG_START_BGRB 0x0004 /* stop RAID background rebuild */ #define ACB_F_IOPDATA_OVERFLOW 0x0008 /* iop message data rqbuffer overflow */ #define ACB_F_MESSAGE_WQBUFFER_CLEARED 0x0010 /* message clear wqbuffer */ #define ACB_F_MESSAGE_RQBUFFER_CLEARED 0x0020 /* message clear rqbuffer */ #define ACB_F_MESSAGE_WQBUFFER_READED 0x0040 #define ACB_F_BUS_RESET 0x0080 #define ACB_F_BUS_HANG_ON 0x0800/* need hardware reset bus */ #define ACB_F_IOP_INITED 0x0100 /* iop init */ #define ACB_F_ABORT 0x0200 #define ACB_F_FIRMWARE_TRAP 0x0400 struct CommandControlBlock * pccb_pool[ARCMSR_MAX_FREECCB_NUM]; /* used for memory free */ struct list_head ccb_free_list; /* head of free ccb list */ atomic_t ccboutstandingcount; /*The present outstanding command number that in the IOP that waiting for being handled by FW*/ void * dma_coherent; /* dma_coherent used for memory free */ dma_addr_t dma_coherent_handle; /* dma_coherent_handle used for memory free */ dma_addr_t dma_coherent_handle_hbb_mu; unsigned int uncache_size; uint8_t rqbuffer[ARCMSR_MAX_QBUFFER]; /* data collection buffer for read from 80331 */ int32_t rqbuf_firstindex; /* first of read buffer */ int32_t rqbuf_lastindex; /* last of read buffer */ uint8_t wqbuffer[ARCMSR_MAX_QBUFFER]; /* data collection buffer for write to 80331 */ int32_t wqbuf_firstindex; /* first of write buffer */ int32_t wqbuf_lastindex; /* last of write buffer */ uint8_t devstate[ARCMSR_MAX_TARGETID][ARCMSR_MAX_TARGETLUN]; /* id0 ..... id15, lun0...lun7 */ #define ARECA_RAID_GONE 0x55 #define ARECA_RAID_GOOD 0xaa uint32_t num_resets; uint32_t num_aborts; uint32_t signature; uint32_t firm_request_len; uint32_t firm_numbers_queue; uint32_t firm_sdram_size; uint32_t firm_hd_channels; uint32_t firm_cfg_version; char firm_model[12]; char firm_version[20]; char device_map[20]; /*21,84-99*/ struct work_struct arcmsr_do_message_isr_bh; struct timer_list eternal_timer; unsigned short fw_flag; #define FW_NORMAL 0x0000 #define FW_BOG 0x0001 #define FW_DEADLOCK 0x0010 atomic_t rq_map_token; atomic_t ante_token_value; };/* HW_DEVICE_EXTENSION */ /* ******************************************************************************* ** Command Control Block ** this CCB length must be 32 bytes boundary ******************************************************************************* */ struct CommandControlBlock { /*x32:sizeof struct_CCB=(32+60)byte, x64:sizeof struct_CCB=(64+60)byte*/ struct list_head list; /*x32: 8byte, x64: 16byte*/ struct scsi_cmnd *pcmd; /*8 bytes pointer of linux scsi command */ struct AdapterControlBlock *acb; /*x32: 4byte, x64: 8byte*/ uint32_t cdb_phyaddr_pattern; /*x32: 4byte, x64: 4byte*/ uint32_t arc_cdb_size; /*x32:4byte,x64:4byte*/ uint16_t ccb_flags; /*x32: 2byte, x64: 2byte*/ #define CCB_FLAG_READ 0x0000 #define CCB_FLAG_WRITE 0x0001 #define CCB_FLAG_ERROR 0x0002 #define CCB_FLAG_FLUSHCACHE 0x0004 #define CCB_FLAG_MASTER_ABORTED 0x0008 uint16_t startdone; /*x32:2byte,x32:2byte*/ #define ARCMSR_CCB_DONE 0x0000 #define ARCMSR_CCB_START 0x55AA #define ARCMSR_CCB_ABORTED 0xAA55 #define ARCMSR_CCB_ILLEGAL 0xFFFF #if BITS_PER_LONG == 64 /* ======================512+64 bytes======================== */ uint32_t reserved[5]; /*24 byte*/ #else /* ======================512+32 bytes======================== */ uint32_t reserved; /*8 byte*/ #endif /* ======================================================= */ struct ARCMSR_CDB arcmsr_cdb; }; /* ******************************************************************************* ** ARECA SCSI sense data ******************************************************************************* */ struct SENSE_DATA { uint8_t ErrorCode:7; #define SCSI_SENSE_CURRENT_ERRORS 0x70 #define SCSI_SENSE_DEFERRED_ERRORS 0x71 uint8_t Valid:1; uint8_t SegmentNumber; uint8_t SenseKey:4; uint8_t Reserved:1; uint8_t IncorrectLength:1; uint8_t EndOfMedia:1; uint8_t FileMark:1; uint8_t Information[4]; uint8_t AdditionalSenseLength; uint8_t CommandSpecificInformation[4]; uint8_t AdditionalSenseCode; uint8_t AdditionalSenseCodeQualifier; uint8_t FieldReplaceableUnitCode; uint8_t SenseKeySpecific[3]; }; /* ******************************************************************************* ** Outbound Interrupt Status Register - OISR ******************************************************************************* */ #define ARCMSR_MU_OUTBOUND_INTERRUPT_STATUS_REG 0x30 #define ARCMSR_MU_OUTBOUND_PCI_INT 0x10 #define ARCMSR_MU_OUTBOUND_POSTQUEUE_INT 0x08 #define ARCMSR_MU_OUTBOUND_DOORBELL_INT 0x04 #define ARCMSR_MU_OUTBOUND_MESSAGE1_INT 0x02 #define ARCMSR_MU_OUTBOUND_MESSAGE0_INT 0x01 #define ARCMSR_MU_OUTBOUND_HANDLE_INT \ (ARCMSR_MU_OUTBOUND_MESSAGE0_INT \ |ARCMSR_MU_OUTBOUND_MESSAGE1_INT \ |ARCMSR_MU_OUTBOUND_DOORBELL_INT \ |ARCMSR_MU_OUTBOUND_POSTQUEUE_INT \ |ARCMSR_MU_OUTBOUND_PCI_INT) /* ******************************************************************************* ** Outbound Interrupt Mask Register - OIMR ******************************************************************************* */ #define ARCMSR_MU_OUTBOUND_INTERRUPT_MASK_REG 0x34 #define ARCMSR_MU_OUTBOUND_PCI_INTMASKENABLE 0x10 #define ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE 0x08 #define ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE 0x04 #define ARCMSR_MU_OUTBOUND_MESSAGE1_INTMASKENABLE 0x02 #define ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE 0x01 #define ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE 0x1F extern void arcmsr_post_ioctldata2iop(struct AdapterControlBlock *); extern void arcmsr_iop_message_read(struct AdapterControlBlock *); extern struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *); extern struct device_attribute *arcmsr_host_attrs[]; extern int arcmsr_alloc_sysfs_attr(struct AdapterControlBlock *); void arcmsr_free_sysfs_attr(struct AdapterControlBlock *acb); src/arcmsr_attr.c0000444000031100003110000003134111377577065012524 0ustar mtsmts/* ******************************************************************************* ** O.S : Linux ** FILE NAME : arcmsr_attr.c ** BY : Erich Chen ** Description: attributes exported to sysfs and device host ******************************************************************************* ** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved ** ** Web site: www.areca.com.tw ** E-mail: support@areca.com.tw ** ** This program is free software; you can redistribute it and/or modify ** it under the terms of the GNU General Public License version 2 as ** published by the Free Software Foundation. ** This program is distributed in the hope that it will be useful, ** but WITHOUT ANY WARRANTY; without even the implied warranty of ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ** GNU General Public License for more details. ******************************************************************************* ** Redistribution and use in source and binary forms, with or without ** modification, are permitted provided that the following conditions ** are met: ** 1. Redistributions of source code must retain the above copyright ** notice, this list of conditions and the following disclaimer. ** 2. Redistributions in binary form must reproduce the above copyright ** notice, this list of conditions and the following disclaimer in the ** documentation and/or other materials provided with the distribution. ** 3. The name of the author may not be used to endorse or promote products ** derived from this software without specific prior written permission. ** ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ******************************************************************************* ** For history of changes, see Documentation/scsi/ChangeLog.arcmsr ** Firmware Specification, see Documentation/scsi/arcmsr_spec.txt ******************************************************************************* */ #include #include #include #include #include #include #include #include #include #include #include "arcmsr.h" struct device_attribute *arcmsr_host_attrs[]; static ssize_t arcmsr_sysfs_iop_message_read(struct kobject *kobj, struct bin_attribute *bin, char *buf, loff_t off, size_t count) { struct device *dev = container_of(kobj,struct device,kobj); struct Scsi_Host *host = class_to_shost(dev); struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; uint8_t *pQbuffer,*ptmpQbuffer; int32_t allxfer_len = 0; if (!capable(CAP_SYS_ADMIN)) return -EACCES; /* do message unit read. */ ptmpQbuffer = (uint8_t *)buf; while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex) && (allxfer_len < 1031)) { pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex]; memcpy(ptmpQbuffer, pQbuffer, 1); acb->rqbuf_firstindex++; acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER; ptmpQbuffer++; allxfer_len++; } if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { struct QBUFFER __iomem *prbuffer; uint8_t __iomem *iop_data; int32_t iop_len; acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; prbuffer = arcmsr_get_iop_rqbuffer(acb); iop_data = prbuffer->data; iop_len = readl(&prbuffer->data_len); while (iop_len > 0) { acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data); acb->rqbuf_lastindex++; acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER; iop_data++; iop_len--; } arcmsr_iop_message_read(acb); } return (allxfer_len); } static ssize_t arcmsr_sysfs_iop_message_write(struct kobject *kobj, struct bin_attribute *bin, char *buf, loff_t off, size_t count) { struct device *dev = container_of(kobj,struct device,kobj); struct Scsi_Host *host = class_to_shost(dev); struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex; uint8_t *pQbuffer, *ptmpuserbuffer; if (!capable(CAP_SYS_ADMIN)) return -EACCES; if (count > 1032) return -EINVAL; /* do message unit write. */ ptmpuserbuffer = (uint8_t *)buf; user_len = (int32_t)count; wqbuf_lastindex = acb->wqbuf_lastindex; wqbuf_firstindex = acb->wqbuf_firstindex; if (wqbuf_lastindex != wqbuf_firstindex) { arcmsr_post_ioctldata2iop(acb); return 0; /*need retry*/ } else { my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1) &(ARCMSR_MAX_QBUFFER - 1); if (my_empty_len >= user_len) { while (user_len > 0) { pQbuffer = &acb->wqbuffer[acb->wqbuf_lastindex]; memcpy(pQbuffer, ptmpuserbuffer, 1); acb->wqbuf_lastindex++; acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER; ptmpuserbuffer++; user_len--; } if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) { acb->acb_flags &= ~ACB_F_MESSAGE_WQBUFFER_CLEARED; arcmsr_post_ioctldata2iop(acb); } return count; } else { return 0; /*need retry*/ } } } static ssize_t arcmsr_sysfs_iop_message_clear(struct kobject *kobj, struct bin_attribute *bin, char *buf, loff_t off, size_t count) { struct device *dev = container_of(kobj,struct device,kobj); struct Scsi_Host *host = class_to_shost(dev); struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; uint8_t *pQbuffer; if (!capable(CAP_SYS_ADMIN)) return -EACCES; if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; arcmsr_iop_message_read(acb); } acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED | ACB_F_MESSAGE_RQBUFFER_CLEARED | ACB_F_MESSAGE_WQBUFFER_READED); acb->rqbuf_firstindex = 0; acb->rqbuf_lastindex = 0; acb->wqbuf_firstindex = 0; acb->wqbuf_lastindex = 0; pQbuffer = acb->rqbuffer; memset(pQbuffer, 0, sizeof (struct QBUFFER)); pQbuffer = acb->wqbuffer; memset(pQbuffer, 0, sizeof (struct QBUFFER)); return 1; } static struct bin_attribute arcmsr_sysfs_message_read_attr = { .attr = { .name = "mu_read", .mode = S_IRUSR , .owner = THIS_MODULE, }, .size = 1032, .read = arcmsr_sysfs_iop_message_read, }; static struct bin_attribute arcmsr_sysfs_message_write_attr = { .attr = { .name = "mu_write", .mode = S_IWUSR, .owner = THIS_MODULE, }, .size = 1032, .write = arcmsr_sysfs_iop_message_write, }; static struct bin_attribute arcmsr_sysfs_message_clear_attr = { .attr = { .name = "mu_clear", .mode = S_IWUSR, .owner = THIS_MODULE, }, .size = 1, .write = arcmsr_sysfs_iop_message_clear, }; int arcmsr_alloc_sysfs_attr(struct AdapterControlBlock *acb) { struct Scsi_Host *host = acb->host; int error; error = sysfs_create_bin_file(&host->shost_dev.kobj, &arcmsr_sysfs_message_read_attr); if (error) { printk(KERN_ERR "arcmsr: alloc sysfs mu_read failed\n"); goto error_bin_file_message_read; } error = sysfs_create_bin_file(&host->shost_dev.kobj, &arcmsr_sysfs_message_write_attr); if (error) { printk(KERN_ERR "arcmsr: alloc sysfs mu_write failed\n"); goto error_bin_file_message_write; } error = sysfs_create_bin_file(&host->shost_dev.kobj, &arcmsr_sysfs_message_clear_attr); if (error) { printk(KERN_ERR "arcmsr: alloc sysfs mu_clear failed\n"); goto error_bin_file_message_clear; } return 0; error_bin_file_message_clear: sysfs_remove_bin_file(&host->shost_dev.kobj, &arcmsr_sysfs_message_write_attr); error_bin_file_message_write: sysfs_remove_bin_file(&host->shost_dev.kobj, &arcmsr_sysfs_message_read_attr); error_bin_file_message_read: return error; } void arcmsr_free_sysfs_attr(struct AdapterControlBlock *acb) { struct Scsi_Host *host = acb->host; sysfs_remove_bin_file(&host->shost_dev.kobj, &arcmsr_sysfs_message_clear_attr); sysfs_remove_bin_file(&host->shost_dev.kobj, &arcmsr_sysfs_message_write_attr); sysfs_remove_bin_file(&host->shost_dev.kobj, &arcmsr_sysfs_message_read_attr); } static ssize_t arcmsr_attr_host_driver_version(struct device *dev, struct device_attribute *attr, char *buf) { return snprintf(buf, PAGE_SIZE, "%s\n", ARCMSR_DRIVER_VERSION); } static ssize_t arcmsr_attr_host_driver_posted_cmd(struct device *dev, struct device_attribute *attr, char *buf) { struct Scsi_Host *host = class_to_shost(dev); struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; return snprintf(buf, PAGE_SIZE, "%4d\n", atomic_read(&acb->ccboutstandingcount)); } static ssize_t arcmsr_attr_host_driver_reset(struct device *dev, struct device_attribute *attr, char *buf) { struct Scsi_Host *host = class_to_shost(dev); struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; return snprintf(buf, PAGE_SIZE, "%4d\n", acb->num_resets); } static ssize_t arcmsr_attr_host_driver_abort(struct device *dev, struct device_attribute *attr, char *buf) { struct Scsi_Host *host = class_to_shost(dev); struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; return snprintf(buf, PAGE_SIZE, "%4d\n", acb->num_aborts); } static ssize_t arcmsr_attr_host_fw_model(struct device *dev, struct device_attribute *attr, char *buf) { struct Scsi_Host *host = class_to_shost(dev); struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; return snprintf(buf, PAGE_SIZE, "%s\n", acb->firm_model); } static ssize_t arcmsr_attr_host_fw_version(struct device *dev, struct device_attribute *attr, char *buf) { struct Scsi_Host *host = class_to_shost(dev); struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; return snprintf(buf, PAGE_SIZE, "%s\n", acb->firm_version); } static ssize_t arcmsr_attr_host_fw_request_len(struct device *dev, struct device_attribute *attr, char *buf) { struct Scsi_Host *host = class_to_shost(dev); struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; return snprintf(buf, PAGE_SIZE, "%4d\n", acb->firm_request_len); } static ssize_t arcmsr_attr_host_fw_numbers_queue(struct device *dev, struct device_attribute *attr, char *buf) { struct Scsi_Host *host = class_to_shost(dev); struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; return snprintf(buf, PAGE_SIZE, "%4d\n", acb->firm_numbers_queue); } static ssize_t arcmsr_attr_host_fw_sdram_size(struct device *dev, struct device_attribute *attr, char *buf) { struct Scsi_Host *host = class_to_shost(dev); struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; return snprintf(buf, PAGE_SIZE, "%4d\n", acb->firm_sdram_size); } static ssize_t arcmsr_attr_host_fw_hd_channels(struct device *dev, struct device_attribute *attr, char *buf) { struct Scsi_Host *host = class_to_shost(dev); struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; return snprintf(buf, PAGE_SIZE, "%4d\n", acb->firm_hd_channels); } static DEVICE_ATTR(host_driver_version, S_IRUGO, arcmsr_attr_host_driver_version, NULL); static DEVICE_ATTR(host_driver_posted_cmd, S_IRUGO, arcmsr_attr_host_driver_posted_cmd, NULL); static DEVICE_ATTR(host_driver_reset, S_IRUGO, arcmsr_attr_host_driver_reset, NULL); static DEVICE_ATTR(host_driver_abort, S_IRUGO, arcmsr_attr_host_driver_abort, NULL); static DEVICE_ATTR(host_fw_model, S_IRUGO, arcmsr_attr_host_fw_model, NULL); static DEVICE_ATTR(host_fw_version, S_IRUGO, arcmsr_attr_host_fw_version, NULL); static DEVICE_ATTR(host_fw_request_len, S_IRUGO, arcmsr_attr_host_fw_request_len, NULL); static DEVICE_ATTR(host_fw_numbers_queue, S_IRUGO, arcmsr_attr_host_fw_numbers_queue, NULL); static DEVICE_ATTR(host_fw_sdram_size, S_IRUGO, arcmsr_attr_host_fw_sdram_size, NULL); static DEVICE_ATTR(host_fw_hd_channels, S_IRUGO, arcmsr_attr_host_fw_hd_channels, NULL); struct device_attribute *arcmsr_host_attrs[] = { &dev_attr_host_driver_version, &dev_attr_host_driver_posted_cmd, &dev_attr_host_driver_reset, &dev_attr_host_driver_abort, &dev_attr_host_fw_model, &dev_attr_host_fw_version, &dev_attr_host_fw_request_len, &dev_attr_host_fw_numbers_queue, &dev_attr_host_fw_sdram_size, &dev_attr_host_fw_hd_channels, NULL, }; src/arcmsr_hba.c0000444000031100003110000030154111377577065012306 0ustar mtsmts/* ******************************************************************************* ** O.S : Linux ** FILE NAME : arcmsr_hba.c ** BY : Erich Chen ** Description: SCSI RAID Device Driver for ** ARECA RAID Host adapter ******************************************************************************* ** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved ** ** Web site: www.areca.com.tw ** E-mail: support@areca.com.tw ** ** This program is free software; you can redistribute it and/or modify ** it under the terms of the GNU General Public License version 2 as ** published by the Free Software Foundation. ** This program is distributed in the hope that it will be useful, ** but WITHOUT ANY WARRANTY; without even the implied warranty of ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ** GNU General Public License for more details. ******************************************************************************* ** Redistribution and use in source and binary forms, with or without ** modification, are permitted provided that the following conditions ** are met: ** 1. Redistributions of source code must retain the above copyright ** notice, this list of conditions and the following disclaimer. ** 2. Redistributions in binary form must reproduce the above copyright ** notice, this list of conditions and the following disclaimer in the ** documentation and/or other materials provided with the distribution. ** 3. The name of the author may not be used to endorse or promote products ** derived from this software without specific prior written permission. ** ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ******************************************************************************* ** For history of changes, see Documentation/scsi/ChangeLog.arcmsr ** Firmware Specification, see Documentation/scsi/arcmsr_spec.txt ******************************************************************************* */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "arcmsr.h" MODULE_AUTHOR("Nick Cheng "); MODULE_DESCRIPTION("ARECA (ARC11xx/12xx/16xx/1880) SATA/SAS RAID Host Bus Adapter"); MODULE_LICENSE("Dual BSD/GPL"); MODULE_VERSION(ARCMSR_DRIVER_VERSION); #define ARCMSR_FW_POLLING 0 static int sleeptime = 10; static int retrycount = 30; wait_queue_head_t wait_q; static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, struct scsi_cmnd *cmd); static int arcmsr_iop_confirm(struct AdapterControlBlock *acb); static int arcmsr_abort(struct scsi_cmnd *); static int arcmsr_device_reset(struct scsi_cmnd *cmd); static int arcmsr_bus_reset(struct scsi_cmnd *); static int arcmsr_bios_param(struct scsi_device *sdev, struct block_device *bdev, sector_t capacity, int *info); static int arcmsr_queue_command(struct scsi_cmnd *cmd, void (*done) (struct scsi_cmnd *)); static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id); static void arcmsr_remove(struct pci_dev *pdev); static void arcmsr_shutdown(struct pci_dev *pdev); static void arcmsr_iop_init(struct AdapterControlBlock *acb); static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb); static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb); static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb); static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb); static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb); static void arcmsr_request_device_map(unsigned long pacb); static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb); static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb); static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb); static void arcmsr_message_isr_bh_fn(void *pacb); static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb); static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb); static void arcmsr_hbc_message_isr(struct AdapterControlBlock *pACB); static void arcmsr_hardware_reset(struct AdapterControlBlock *acb); static const char *arcmsr_info(struct Scsi_Host *); static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb); static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev, int queue_depth) { if (queue_depth > ARCMSR_MAX_CMD_PERLUN) queue_depth = ARCMSR_MAX_CMD_PERLUN; scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, queue_depth); return queue_depth; } static struct scsi_host_template arcmsr_scsi_host_template = { .module = THIS_MODULE, .name = "ARCMSR ARECA SATA/SAS RAID Controller" ARCMSR_DRIVER_VERSION, .info = arcmsr_info, .queuecommand = arcmsr_queue_command, .eh_abort_handler = arcmsr_abort, .eh_device_reset_handler = arcmsr_device_reset, .eh_bus_reset_handler = arcmsr_bus_reset, .bios_param = arcmsr_bios_param, .change_queue_depth = arcmsr_adjust_disk_queue_depth, .can_queue = ARCMSR_MAX_FREECCB_NUM, .this_id = ARCMSR_SCSI_INITIATOR_ID, .sg_tablesize = ARCMSR_DEFAULT_SG_ENTRIES, .max_sectors = ARCMSR_MAX_XFER_SECTORS_C, .cmd_per_lun = ARCMSR_MAX_CMD_PERLUN, .use_clustering = ENABLE_CLUSTERING, //.shost_attrs = arcmsr_host_attrs, }; #ifdef CONFIG_SCSI_ARCMSR_AER static pci_ers_result_t arcmsr_pci_slot_reset(struct pci_dev *pdev); static pci_ers_result_t arcmsr_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state); static struct pci_error_handlers arcmsr_pci_error_handlers = { .error_detected = arcmsr_pci_error_detected, .slot_reset = arcmsr_pci_slot_reset, }; #endif static struct pci_device_id arcmsr_device_id_table[] = { {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681)}, {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880)}, {0, 0}, /* Terminating entry */ }; MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table); static struct pci_driver arcmsr_pci_driver = { .name = "arcmsr", .id_table = arcmsr_device_id_table, .probe = arcmsr_probe, .remove = arcmsr_remove, .shutdown = arcmsr_shutdown, #ifdef CONFIG_SCSI_ARCMSR_AER .err_handler = &arcmsr_pci_error_handlers, #endif }; /* **************************************************************************** **************************************************************************** */ int arcmsr_sleep_for_bus_reset(struct scsi_cmnd *cmd) { struct Scsi_Host *shost = NULL; int i, isleep; shost = cmd->device->host; isleep = sleeptime / 10; if (isleep > 0) { for (i = 0; i < isleep; i ++) { msleep(10000); } } isleep = sleeptime % 10; if (isleep > 0) { msleep(isleep*1000); } printk("wake-up\n"); return 0; } static void arcmsr_free_hbb_mu(struct AdapterControlBlock *acb) { switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: case ACB_ADAPTER_TYPE_C: break; case ACB_ADAPTER_TYPE_B:{ dma_free_coherent(&acb->pdev->dev, sizeof(struct MessageUnit_B), acb->pmuB, acb->dma_coherent_handle_hbb_mu); } } } static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb) { struct pci_dev *pdev = acb->pdev; switch (acb->adapter_type){ case ACB_ADAPTER_TYPE_A:{ acb->pmuA = ioremap(pci_resource_start(pdev,0), pci_resource_len(pdev,0)); if (!acb->pmuA) { printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); return false; } break; } case ACB_ADAPTER_TYPE_B:{ void __iomem *mem_base0, *mem_base1; mem_base0 = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); if (!mem_base0) { printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); return false; } mem_base1 = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2)); if (!mem_base1) { iounmap(mem_base0); printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); return false; } acb->mem_base0 = mem_base0; acb->mem_base1 = mem_base1; break; } case ACB_ADAPTER_TYPE_C:{ acb->pmuC = ioremap_nocache(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1)); if (!acb->pmuC){ printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); return false; } if(readl(&acb->pmuC->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE){ writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR,&acb->pmuC->outbound_doorbell_clear);/*clear interrupt*/ return TRUE; } break; } } return true; } static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb) { switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A:{ iounmap(acb->pmuA); } break; case ACB_ADAPTER_TYPE_B:{ iounmap(acb->mem_base0); iounmap(acb->mem_base1); } break; case ACB_ADAPTER_TYPE_C:{ iounmap(acb->pmuC); } } } static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id) { irqreturn_t handle_state; struct AdapterControlBlock *acb = dev_id; handle_state = arcmsr_interrupt(acb); return handle_state; } static int arcmsr_bios_param(struct scsi_device *sdev, struct block_device *bdev, sector_t capacity, int *geom) { int ret, heads, sectors, cylinders, total_capacity; unsigned char *buffer;/* return copy of block device's partition table */ buffer = scsi_bios_ptable(bdev); if (buffer) { ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]); kfree(buffer); if (ret != -1) return ret; } total_capacity = capacity; heads = 64; sectors = 32; cylinders = total_capacity / (heads * sectors); if (cylinders > 1024) { heads = 255; sectors = 63; cylinders = total_capacity / (heads * sectors); } geom[0] = heads; geom[1] = sectors; geom[2] = cylinders; return 0; } static void arcmsr_define_adapter_type(struct AdapterControlBlock *acb) { struct pci_dev *pdev = acb->pdev; u16 dev_id; pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id); acb->dev_id = dev_id; switch (dev_id) { case 0x1880 : { acb->adapter_type = ACB_ADAPTER_TYPE_C; } break; case 0x1201 : { acb->adapter_type = ACB_ADAPTER_TYPE_B; } break; default : acb->adapter_type = ACB_ADAPTER_TYPE_A; } } static uint8_t arcmsr_hba_wait_msgint_ready(struct AdapterControlBlock *acb) { struct MessageUnit_A __iomem *reg = acb->pmuA; uint32_t Index; uint8_t Retries = 0x00; do { for (Index = 0; Index < 100; Index++) { if (readl(®->outbound_intstatus) & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) { writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, ®->outbound_intstatus); return TRUE; } msleep(10); }/*max 1 seconds*/ } while (Retries++ < 20);/*max 20 sec*/ return FALSE; } static uint8_t arcmsr_hbb_wait_msgint_ready(struct AdapterControlBlock *acb) { struct MessageUnit_B *reg = acb->pmuB; uint32_t Index; uint8_t Retries = 0x00; do { for (Index = 0; Index < 100; Index++) { if (readl(reg->iop2drv_doorbell) & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) { writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN , reg->iop2drv_doorbell); writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell); return TRUE; } msleep(10); }/*max 1 seconds*/ } while (Retries++ < 20);/*max 20 sec*/ return FALSE; } static uint8_t arcmsr_hbc_wait_msgint_ready(struct AdapterControlBlock *pACB) { struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC; unsigned char Retries = 0x00; uint32_t Index; do{ for(Index= 0; Index < 100; Index++){ if(readl(&phbcmu->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE){ writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR,&phbcmu->outbound_doorbell_clear);/*clear interrupt*/ return TRUE; } /* one us delay */ msleep(10); }/*max 1 seconds*/ }while(Retries++ < 20);/*max 20 sec*/ return FALSE; } static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb) { struct MessageUnit_A __iomem *reg = acb->pmuA; int retry_count = 30; writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0); do { if (arcmsr_hba_wait_msgint_ready(acb)) break; else { retry_count--; printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ timeout, retry count down = %d \n", acb->host->host_no, retry_count); } } while (retry_count != 0); } static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb) { struct MessageUnit_B *reg = acb->pmuB; int retry_count = 30; writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell); do { if (arcmsr_hbb_wait_msgint_ready(acb)) break; else { retry_count--; printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ timeout,retry count down = %d \n", acb->host->host_no, retry_count); } } while (retry_count != 0); } static void arcmsr_flush_hbc_cache(struct AdapterControlBlock *pACB) { struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC; int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */ writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0); writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); do{ if(arcmsr_hbc_wait_msgint_ready(pACB)){ break; }else{ retry_count--; printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ timeout,retry count down = %d \n", pACB->host->host_no, retry_count); } }while(retry_count!=0); return; } static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb) { switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { arcmsr_flush_hba_cache(acb); } break; case ACB_ADAPTER_TYPE_B: { arcmsr_flush_hbb_cache(acb); } break; case ACB_ADAPTER_TYPE_C: { arcmsr_flush_hbc_cache(acb); } } } static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb) { struct pci_dev *pdev = acb->pdev; void *dma_coherent; dma_addr_t dma_coherent_handle; struct CommandControlBlock *ccb_tmp; int i = 0, j = 0; dma_addr_t cdb_phyaddr; unsigned long roundup_ccbsize = 0, offset; unsigned long max_xfer_len; unsigned long max_sg_entrys; uint32_t firm_config_version; for (i = 0; i < ARCMSR_MAX_TARGETID; i++) for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++) acb->devstate[i][j] = ARECA_RAID_GONE; max_xfer_len = ARCMSR_MAX_XFER_LEN; max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES; firm_config_version = acb->firm_cfg_version; if((firm_config_version & 0xFF) >= 3){ max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 4M byte */ max_sg_entrys = (max_xfer_len/4096); } acb->host->max_sectors = max_xfer_len/512; acb->host->sg_tablesize = SG_ALL; roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (SG_ALL - 1) * sizeof(struct SG64ENTRY), 32); acb->uncache_size = roundup_ccbsize * ARCMSR_MAX_FREECCB_NUM + 32; dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL); if(!dma_coherent){ printk("arcmsr%d: dma_alloc_coherent got error \n", acb->host->host_no); return -ENOMEM; } acb->dma_coherent = dma_coherent; acb->dma_coherent_handle = dma_coherent_handle; memset(dma_coherent, 0, acb->uncache_size); offset = roundup((unsigned long)dma_coherent, 32) - (unsigned long)dma_coherent; dma_coherent_handle = dma_coherent_handle + offset; dma_coherent = (struct CommandControlBlock *)dma_coherent + offset; ccb_tmp = dma_coherent; acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle; for(i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++){ cdb_phyaddr = dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb); ccb_tmp->cdb_phyaddr_pattern = ((acb->adapter_type == ACB_ADAPTER_TYPE_C) ? cdb_phyaddr : (cdb_phyaddr >> 5)); acb->pccb_pool[i] = ccb_tmp; ccb_tmp->acb = acb; INIT_LIST_HEAD(&ccb_tmp->list); list_add_tail(&ccb_tmp->list, &acb->ccb_free_list); ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize); dma_coherent_handle = dma_coherent_handle + roundup_ccbsize; } return 0; } #if ARCMSR_FW_POLLING static void arcmsr_message_isr_bh_fn(void *pacb) { struct AdapterControlBlock *acb = (struct AdapterControlBlock *)pacb; switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { struct MessageUnit_A __iomem *reg = acb->pmuA; char *acb_dev_map = (char *)acb->device_map; uint32_t __iomem *signature = (uint32_t __iomem*) (®->message_rwbuffer[0]); char __iomem *devicemap = (char __iomem*) (®->message_rwbuffer[21]); int target, lun; struct scsi_device *psdev; char diff; atomic_inc(&acb->rq_map_token); if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) { for(target = 0; target < ARCMSR_MAX_TARGETID -1; target++) { diff = (*acb_dev_map)^readb(devicemap); if (diff != 0) { char temp; *acb_dev_map = readb(devicemap); temp =*acb_dev_map; for(lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) { if((temp & 0x01)==1 && (diff & 0x01) == 1) { scsi_add_device(acb->host, 0, target, lun); }else if((temp & 0x01) == 0 && (diff & 0x01) == 1) { psdev = scsi_device_lookup(acb->host, 0, target, lun); if (psdev != NULL ) { scsi_remove_device(psdev); scsi_device_put(psdev); } } temp >>= 1; diff >>= 1; } } devicemap++; acb_dev_map++; } } break; } case ACB_ADAPTER_TYPE_B: { struct MessageUnit_B *reg = acb->pmuB; char *acb_dev_map = (char *)acb->device_map; uint32_t __iomem *signature = (uint32_t __iomem*)(®->message_rwbuffer[0]); char __iomem *devicemap = (char __iomem*)(®->message_rwbuffer[21]); int target, lun; struct scsi_device *psdev; char diff; atomic_inc(&acb->rq_map_token); if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) { for(target = 0; target < ARCMSR_MAX_TARGETID -1; target++) { diff = (*acb_dev_map)^readb(devicemap); if (diff != 0) { char temp; *acb_dev_map = readb(devicemap); temp =*acb_dev_map; for(lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) { if((temp & 0x01)==1 && (diff & 0x01) == 1) { scsi_add_device(acb->host, 0, target, lun); }else if((temp & 0x01) == 0 && (diff & 0x01) == 1) { psdev = scsi_device_lookup(acb->host, 0, target, lun); if (psdev != NULL ) { scsi_remove_device(psdev); scsi_device_put(psdev); } } temp >>= 1; diff >>= 1; } } devicemap++; acb_dev_map++; } } } break; case ACB_ADAPTER_TYPE_C: { struct MessageUnit_C *reg = acb->pmuC; char *acb_dev_map = (char *)acb->device_map; uint32_t __iomem *signature = (uint32_t __iomem*)(®->msgcode_rwbuffer[0]); char __iomem *devicemap = (char __iomem*)(®->msgcode_rwbuffer[21]); int target, lun; struct scsi_device *psdev; char diff; atomic_inc(&acb->rq_map_token); if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) { for(target = 0; target < ARCMSR_MAX_TARGETID -1; target++) { diff = (*acb_dev_map)^readb(devicemap); if (diff != 0) { char temp; *acb_dev_map = readb(devicemap); temp =*acb_dev_map; for(lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) { if((temp & 0x01)==1 && (diff & 0x01) == 1) { scsi_add_device(acb->host, 0, target, lun); }else if((temp & 0x01) == 0 && (diff & 0x01) == 1) { psdev = scsi_device_lookup(acb->host, 0, target, lun); if (psdev != NULL ) { scsi_remove_device(psdev); scsi_device_put(psdev); } } temp >>= 1; diff >>= 1; } } devicemap++; acb_dev_map++; } } } } } #endif static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id) { struct Scsi_Host *host; struct AdapterControlBlock *acb; uint8_t bus,dev_fun; int error; error = pci_enable_device(pdev); if(error){ return -ENODEV; } host = scsi_host_alloc(&arcmsr_scsi_host_template, sizeof(struct AdapterControlBlock)); if(!host){ goto pci_disable_dev; } error = pci_set_dma_mask(pdev, DMA_64BIT_MASK); if(error){ error = pci_set_dma_mask(pdev, DMA_32BIT_MASK); if(error){ printk(KERN_WARNING "scsi%d: No suitable DMA mask available\n", host->host_no); goto scsi_host_release; } } init_waitqueue_head(&wait_q); bus = pdev->bus->number; dev_fun = pdev->devfn; acb = (struct AdapterControlBlock *) host->hostdata; memset(acb,0,sizeof(struct AdapterControlBlock)); acb->pdev = pdev; acb->host = host; host->max_lun = ARCMSR_MAX_TARGETLUN; host->max_id = ARCMSR_MAX_TARGETID; /*16:8*/ host->max_cmd_len = 16; /*this is issue of 64bit LBA ,over 2T byte*/ host->can_queue = ARCMSR_MAX_FREECCB_NUM; /* max simultaneous cmds */ host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN; host->this_id = ARCMSR_SCSI_INITIATOR_ID; host->unique_id = (bus << 8) | dev_fun; pci_set_drvdata(pdev, host); pci_set_master(pdev); error = pci_request_regions(pdev, "arcmsr"); if(error){ goto scsi_host_release; } spin_lock_init(&acb->eh_lock); spin_lock_init(&acb->ccblist_lock); acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED | ACB_F_MESSAGE_RQBUFFER_CLEARED | ACB_F_MESSAGE_WQBUFFER_READED); acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER; INIT_LIST_HEAD(&acb->ccb_free_list); arcmsr_define_adapter_type(acb); error = arcmsr_remap_pciregion(acb); if(!error){ goto pci_release_regs; } error = arcmsr_get_firmware_spec(acb); if(!error){ goto unmap_pci_region; } error = arcmsr_alloc_ccb_pool(acb); if(error){ goto free_hbb_mu; } arcmsr_iop_init(acb); error = scsi_add_host(host, &pdev->dev); if(error){ goto RAID_controller_stop; } error = request_irq(pdev->irq, arcmsr_do_interrupt, IRQF_SHARED, "arcmsr", acb); if(error){ goto scsi_host_remove; } host->irq = pdev->irq; scsi_scan_host(host); #if ARCMSR_FW_POLLING INIT_WORK(&acb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn, acb); atomic_set(&acb->rq_map_token, 16); atomic_set(&acb->ante_token_value, 16); acb->fw_flag = FW_NORMAL; init_timer(&acb->eternal_timer); acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ); acb->eternal_timer.data = (unsigned long) acb; acb->eternal_timer.function = &arcmsr_request_device_map; add_timer(&acb->eternal_timer); #endif //if(arcmsr_alloc_sysfs_attr(acb)) // goto out_free_sysfs; return 0; out_free_sysfs: scsi_host_remove: scsi_remove_host(host); RAID_controller_stop: arcmsr_stop_adapter_bgrb(acb); arcmsr_flush_adapter_cache(acb); arcmsr_free_ccb_pool(acb); free_hbb_mu: arcmsr_free_hbb_mu(acb); unmap_pci_region: arcmsr_unmap_pciregion(acb); pci_release_regs: pci_release_regions(pdev); scsi_host_release: scsi_host_put(host); pci_disable_dev: pci_disable_device(pdev); return -ENODEV; } static uint8_t arcmsr_abort_hba_allcmd(struct AdapterControlBlock *acb) { struct MessageUnit_A __iomem *reg = acb->pmuA; writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0); if (!arcmsr_hba_wait_msgint_ready(acb)){ printk(KERN_NOTICE "arcmsr%d: wait 'abort all outstanding command' timeout \n" , acb->host->host_no); return FALSE; } return TRUE; } static uint8_t arcmsr_abort_hbb_allcmd(struct AdapterControlBlock *acb) { struct MessageUnit_B *reg = acb->pmuB; writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell); if (!arcmsr_hbb_wait_msgint_ready(acb)) { printk(KERN_NOTICE "arcmsr%d: wait 'abort all outstanding command' timeout \n" , acb->host->host_no); return FALSE; } return TRUE; } static uint8_t arcmsr_abort_hbc_allcmd(struct AdapterControlBlock *pACB) { struct MessageUnit_C *reg =(struct MessageUnit_C *)pACB->pmuC; writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0); writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); if(!arcmsr_hbc_wait_msgint_ready(pACB)){ printk(KERN_NOTICE "arcmsr%d: wait 'abort all outstanding command' timeout \n" , pACB->host->host_no); return FALSE; } return TRUE; } static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb) { uint8_t rtnval = 0; switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { rtnval = arcmsr_abort_hba_allcmd(acb); } break; case ACB_ADAPTER_TYPE_B: { rtnval = arcmsr_abort_hbb_allcmd(acb); } break; case ACB_ADAPTER_TYPE_C: { rtnval = arcmsr_abort_hbc_allcmd(acb); } } return rtnval; } static bool arcmsr_hbb_enable_driver_mode(struct AdapterControlBlock *pacb) { struct MessageUnit_B *reg = pacb->pmuB; writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell); if(!arcmsr_hbb_wait_msgint_ready(pacb)){ printk(KERN_ERR "arcmsr%d: can't set driver mode. \n", pacb->host->host_no); return false; } return true; } static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb) { struct AdapterControlBlock *acb=ccb->acb; struct scsi_cmnd *pcmd=ccb->pcmd; struct scatterlist *sl; #if ARCMSR_DEBUG printk("arcmsr_pci_unmap_dma............................\n"); #endif sl = (struct scatterlist *) pcmd->request_buffer; if(pcmd->use_sg != 0){ pci_unmap_sg(acb->pdev, sl, pcmd->use_sg, pcmd->sc_data_direction); }else if(pcmd->request_bufflen != 0){ pci_unmap_single(acb->pdev,(dma_addr_t)(unsigned long)pcmd->SCp.ptr,pcmd->request_bufflen, pcmd->sc_data_direction); } } static void arcmsr_ccb_complete(struct CommandControlBlock *ccb) { struct AdapterControlBlock *acb = ccb->acb; struct scsi_cmnd *pcmd = ccb->pcmd; unsigned long flags; atomic_dec(&acb->ccboutstandingcount); arcmsr_pci_unmap_dma(ccb); ccb->startdone = ARCMSR_CCB_DONE; spin_lock_irqsave(&acb->ccblist_lock, flags); list_add_tail(&ccb->list, &acb->ccb_free_list); spin_unlock_irqrestore(&acb->ccblist_lock, flags); pcmd->scsi_done(pcmd); } static void arcmsr_report_sense_info(struct CommandControlBlock *ccb) { struct scsi_cmnd *pcmd = ccb->pcmd; struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer; pcmd->result = DID_OK << 16; if (sensebuffer) { int sense_data_length = sizeof(struct SENSE_DATA) < SCSI_SENSE_BUFFERSIZE ? sizeof(struct SENSE_DATA) : SCSI_SENSE_BUFFERSIZE; memset(sensebuffer, 0, SCSI_SENSE_BUFFERSIZE); memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length); sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS; sensebuffer->Valid = 1; } } static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb) { u32 orig_mask = 0; switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A : { struct MessageUnit_A __iomem *reg = acb->pmuA; orig_mask = readl(®->outbound_intmask); writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \ ®->outbound_intmask); } break; case ACB_ADAPTER_TYPE_B : { struct MessageUnit_B *reg = acb->pmuB; orig_mask = readl(reg->iop2drv_doorbell_mask); writel(0, reg->iop2drv_doorbell_mask); } break; case ACB_ADAPTER_TYPE_C:{ struct MessageUnit_C *reg=(struct MessageUnit_C *)acb->pmuC; /* disable all outbound interrupt */ orig_mask = readl(®->host_int_mask); /* disable outbound message0 int */ writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, ®->host_int_mask); } break; } return orig_mask; } static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb, bool error) { uint8_t id, lun; id = ccb->pcmd->device->id; lun = ccb->pcmd->device->lun; if (!error) { if (acb->devstate[id][lun] == ARECA_RAID_GONE) acb->devstate[id][lun] = ARECA_RAID_GOOD; ccb->pcmd->result = DID_OK << 16; arcmsr_ccb_complete(ccb); }else{ switch (ccb->arcmsr_cdb.DeviceStatus) { case ARCMSR_DEV_SELECT_TIMEOUT: { acb->devstate[id][lun] = ARECA_RAID_GONE; ccb->pcmd->result = DID_NO_CONNECT << 16; arcmsr_ccb_complete(ccb); } break; case ARCMSR_DEV_ABORTED: case ARCMSR_DEV_INIT_FAIL: { acb->devstate[id][lun] = ARECA_RAID_GONE; ccb->pcmd->result = DID_BAD_TARGET << 16; arcmsr_ccb_complete(ccb); } break; case ARCMSR_DEV_CHECK_CONDITION: { acb->devstate[id][lun] = ARECA_RAID_GOOD; arcmsr_report_sense_info(ccb); arcmsr_ccb_complete(ccb); } break; default: printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d isr get command error done, \ but got unknown DeviceStatus = 0x%x \n" , acb->host->host_no , id , lun , ccb->arcmsr_cdb.DeviceStatus); acb->devstate[id][lun] = ARECA_RAID_GONE; ccb->pcmd->result = DID_NO_CONNECT << 16; arcmsr_ccb_complete(ccb); break; } } } static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error) { int id, lun; if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) { if (pCCB->startdone == ARCMSR_CCB_ABORTED) { struct scsi_cmnd *abortcmd = pCCB->pcmd; if (abortcmd) { id = abortcmd->device->id; lun = abortcmd->device->lun; abortcmd->result |= DID_ABORT << 16; arcmsr_ccb_complete(pCCB); printk(KERN_NOTICE "arcmsr%d: pCCB ='0x%p' isr got aborted command \n", acb->host->host_no, pCCB); } } printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \ done acb = '0x%p'" "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x" " ccboutstandingcount = %d \n" , acb->host->host_no , acb , pCCB , pCCB->acb , pCCB->startdone , atomic_read(&acb->ccboutstandingcount)); } arcmsr_report_ccb_state(acb, pCCB, error); } static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb) { int i = 0; uint32_t flag_ccb; struct ARCMSR_CDB *pARCMSR_CDB; bool error; struct CommandControlBlock *pCCB; switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { struct MessageUnit_A __iomem *reg = acb->pmuA; uint32_t outbound_intstatus; outbound_intstatus = readl(®->outbound_intstatus) & acb->outbound_int_enable; /*clear and abort all outbound posted Q*/ writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/ while(((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF) && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) { pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/ pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); error=(flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0)?TRUE:FALSE; arcmsr_drain_donequeue(acb, pCCB, error); } } break; case ACB_ADAPTER_TYPE_B: { struct MessageUnit_B *reg = acb->pmuB; /*clear all outbound posted Q*/ writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, ®->iop2drv_doorbell); /* clear doorbell interrupt */ for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) { if ((flag_ccb = readl(®->done_qbuffer[i])) != 0){ writel(0, ®->done_qbuffer[i]); pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/ pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0)?TRUE:FALSE; arcmsr_drain_donequeue(acb, pCCB, error); } reg->post_qbuffer[i]=0; } reg->doneq_index = 0; reg->postq_index = 0; } break; case ACB_ADAPTER_TYPE_C: { struct MessageUnit_C *reg = acb->pmuC; struct ARCMSR_CDB *pARCMSR_CDB; uint32_t flag_ccb, ccb_cdb_phy; bool error; struct CommandControlBlock *pCCB; while((readl(®->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)){ /*need to do*/ flag_ccb = readl(®->outbound_queueport_low); ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0); pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+ccb_cdb_phy);/*frame must be 32 bytes aligned*/ pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)?TRUE:FALSE; arcmsr_drain_donequeue(acb, pCCB, error); } } } } static void arcmsr_remove(struct pci_dev *pdev) { struct Scsi_Host *host = pci_get_drvdata(pdev); struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; int poll_count = 0; //arcmsr_free_sysfs_attr(acb); scsi_remove_host(host); scsi_host_put(host); #if ARCMSR_FW_POLLING flush_scheduled_work(); del_timer_sync(&acb->eternal_timer); #endif arcmsr_disable_outbound_ints(acb); arcmsr_stop_adapter_bgrb(acb); arcmsr_flush_adapter_cache(acb); acb->acb_flags |= ACB_F_SCSISTOPADAPTER; acb->acb_flags &= ~ACB_F_IOP_INITED; for (poll_count = 0; poll_count < ARCMSR_MAX_OUTSTANDING_CMD; poll_count++){ if (!atomic_read(&acb->ccboutstandingcount)) break; arcmsr_interrupt(acb);/* FIXME: need spinlock */ msleep(25); } if (atomic_read(&acb->ccboutstandingcount)) { int i; arcmsr_abort_allcmd(acb); arcmsr_done4abort_postqueue(acb); for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { struct CommandControlBlock *ccb = acb->pccb_pool[i]; if (ccb->startdone == ARCMSR_CCB_START) { ccb->startdone = ARCMSR_CCB_ABORTED; ccb->pcmd->result = DID_ABORT << 16; arcmsr_ccb_complete(ccb); } } } free_irq(pdev->irq, acb); arcmsr_free_ccb_pool(acb); arcmsr_free_hbb_mu(acb); arcmsr_unmap_pciregion(acb); pci_release_regions(pdev); pci_disable_device(pdev); pci_set_drvdata(pdev, NULL); } static void arcmsr_shutdown(struct pci_dev *pdev) { struct Scsi_Host *host = pci_get_drvdata(pdev); struct AdapterControlBlock *acb = (struct AdapterControlBlock *)host->hostdata; arcmsr_disable_outbound_ints(acb); #if ARCMSR_FW_POLLING del_timer_sync(&acb->eternal_timer); flush_scheduled_work(); #endif arcmsr_stop_adapter_bgrb(acb); arcmsr_flush_adapter_cache(acb); } static int arcmsr_module_init(void) { int error = 0; error = pci_register_driver(&arcmsr_pci_driver); return error; } static void arcmsr_module_exit(void) { pci_unregister_driver(&arcmsr_pci_driver); } module_init(arcmsr_module_init); module_exit(arcmsr_module_exit); static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb, u32 intmask_org) { u32 mask; switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A : { struct MessageUnit_A __iomem *reg = acb->pmuA; mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE | ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE| ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE); writel(mask, ®->outbound_intmask); acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff; } break; case ACB_ADAPTER_TYPE_B : { struct MessageUnit_B *reg = acb->pmuB; mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK | ARCMSR_IOP2DRV_DATA_READ_OK | ARCMSR_IOP2DRV_CDB_DONE | ARCMSR_IOP2DRV_MESSAGE_CMD_DONE); writel(mask, reg->iop2drv_doorbell_mask); acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f; } break; case ACB_ADAPTER_TYPE_C : { struct MessageUnit_C *reg = acb->pmuC; mask=~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK |ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK); writel(intmask_org & mask, ®->host_int_mask); acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f; } } } static int arcmsr_build_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd) { struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb; uint8_t *psge = (uint8_t *)&arcmsr_cdb->u; __le32 address_lo, address_hi; int arccdbsize = 0x30, sgcount = 0; __le32 length = 0; int i; int use_sg; unsigned request_bufflen; ccb->pcmd = pcmd; memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB)); arcmsr_cdb->TargetID = pcmd->device->id; arcmsr_cdb->LUN = pcmd->device->lun; arcmsr_cdb->Function = 1; arcmsr_cdb->Context = 0; memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len); request_bufflen = pcmd->request_bufflen; use_sg = pcmd->use_sg; if(use_sg > 0){ __le32 length = 0, length_sum =0; int i; struct scatterlist *sl; sl = (struct scatterlist *) pcmd->request_buffer; sgcount=pci_map_sg(acb->pdev, sl, pcmd->use_sg, pcmd->sc_data_direction); if(sgcount > (acb->host->sg_tablesize)){ unsigned long flags; vmk_WarningMessage("the sg count is over the limit...................... \n"); spin_lock_irqsave(&acb->ccblist_lock, flags); list_add_tail(&ccb->list, &acb->ccb_free_list); spin_unlock_irqrestore(&acb->ccblist_lock, flags); return FAILED; } if(sgcount){ for(i = 0; i < sgcount; i++){ length = cpu_to_le32(sg_dma_len(sl)); address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sl))); address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sl))); if(address_hi == 0){ struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge; pdma_sg->address = address_lo; pdma_sg->length = length; psge += sizeof (struct SG32ENTRY); arccdbsize += sizeof (struct SG32ENTRY); }else{ struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge; pdma_sg->addresshigh = address_hi; pdma_sg->address = address_lo; pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR); psge += sizeof (struct SG64ENTRY); arccdbsize += sizeof (struct SG64ENTRY); } sl = sg_next(sl); } arcmsr_cdb->sgcount = (uint8_t)sgcount; arcmsr_cdb->DataLength = request_bufflen; arcmsr_cdb->msgPages = arccdbsize/0x100 + (arccdbsize % 0x100 ? 1 : 0); if( arccdbsize > 256) arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE; } }else if(request_bufflen){ dma_addr_t dma_addr; dma_addr = pci_map_single(acb->pdev, pcmd->request_buffer, pcmd->request_bufflen, pcmd->sc_data_direction); /* We hide it here for later unmap. */ pcmd->SCp.ptr = (char *)(unsigned long)dma_addr; address_lo = cpu_to_le32(dma_addr_lo32(dma_addr)); address_hi = cpu_to_le32(dma_addr_hi32(dma_addr)); if(address_hi==0) { struct SG32ENTRY* pdma_sg = (struct SG32ENTRY*)psge; pdma_sg->address = address_lo; pdma_sg->length = request_bufflen; arccdbsize += sizeof (struct SG32ENTRY); } else{ struct SG64ENTRY* pdma_sg=(struct SG64ENTRY*)psge; pdma_sg->addresshigh = address_hi; pdma_sg->address = address_lo; pdma_sg->length = request_bufflen|cpu_to_le32(IS_SG64_ADDR); arccdbsize += sizeof (struct SG64ENTRY); } arcmsr_cdb->sgcount=1; arcmsr_cdb->DataLength = request_bufflen; } if (pcmd->cmnd[0]|WRITE_6 || pcmd->cmnd[0]|WRITE_10 || pcmd->cmnd[0]|WRITE_12 ){ arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE; } ccb->arc_cdb_size = arccdbsize; return SUCCESS; } static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb) { uint32_t cdb_phyaddr_pattern = ccb->cdb_phyaddr_pattern; struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb; atomic_inc(&acb->ccboutstandingcount); ccb->startdone = ARCMSR_CCB_START; switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { struct MessageUnit_A __iomem *reg = acb->pmuA; if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) writel(cdb_phyaddr_pattern | ARCMSR_CCBPOST_FLAG_SGL_BSIZE, ®->inbound_queueport); else { writel(cdb_phyaddr_pattern, ®->inbound_queueport); } } break; case ACB_ADAPTER_TYPE_B: { struct MessageUnit_B *reg = acb->pmuB; uint32_t ending_index, index = reg->postq_index; ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE); writel(0, ®->post_qbuffer[ending_index]); if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) { writel(cdb_phyaddr_pattern | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,\ ®->post_qbuffer[index]); }else{ writel(cdb_phyaddr_pattern, ®->post_qbuffer[index]); } index++; index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */ reg->postq_index = index; writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell); } break; case ACB_ADAPTER_TYPE_C: { struct MessageUnit_C *phbcmu=(struct MessageUnit_C *)acb->pmuC; uint32_t ccb_post_stamp, arc_cdb_size; arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300:ccb->arc_cdb_size; ccb_post_stamp = (cdb_phyaddr_pattern | ((arc_cdb_size-1) >> 6) |1); if(acb->cdb_phyaddr_hi32){ writel(acb->cdb_phyaddr_hi32, &phbcmu->inbound_queueport_high); writel(ccb_post_stamp, &phbcmu->inbound_queueport_low); }else{ writel(ccb_post_stamp, &phbcmu->inbound_queueport_low); } } } } static void arcmsr_stop_hba_bgrb(struct AdapterControlBlock *acb) { struct MessageUnit_A __iomem *reg = acb->pmuA; acb->acb_flags &= ~ACB_F_MSG_START_BGRB; writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0); if (!arcmsr_hba_wait_msgint_ready(acb)) { printk(KERN_NOTICE "arcmsr%d: wait 'stop adapter background rebulid' timeout \n" , acb->host->host_no); } } static void arcmsr_stop_hbb_bgrb(struct AdapterControlBlock *acb) { struct MessageUnit_B *reg = acb->pmuB; acb->acb_flags &= ~ACB_F_MSG_START_BGRB; writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell); if (!arcmsr_hbb_wait_msgint_ready(acb)) { printk(KERN_NOTICE "arcmsr%d: wait 'stop adapter background rebulid' timeout \n" , acb->host->host_no); } } static void arcmsr_stop_hbc_bgrb(struct AdapterControlBlock *pACB) { struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC; pACB->acb_flags &= ~ACB_F_MSG_START_BGRB; writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0); writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); if(!arcmsr_hbc_wait_msgint_ready(pACB)){ printk(KERN_NOTICE "arcmsr%d: wait 'stop adapter background rebulid' timeout \n" , pACB->host->host_no); } return; } static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb) { switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { arcmsr_stop_hba_bgrb(acb); } break; case ACB_ADAPTER_TYPE_B: { arcmsr_stop_hbb_bgrb(acb); } break; case ACB_ADAPTER_TYPE_C: { arcmsr_stop_hbc_bgrb(acb); } } } static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb) { dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle); } void arcmsr_iop_message_read(struct AdapterControlBlock *acb) { switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { struct MessageUnit_A __iomem *reg = acb->pmuA; writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); } break; case ACB_ADAPTER_TYPE_B: { struct MessageUnit_B *reg = acb->pmuB; writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell); } break; case ACB_ADAPTER_TYPE_C: { struct MessageUnit_C __iomem *reg = acb->pmuC; writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell); } } } static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb) { switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { struct MessageUnit_A __iomem *reg = acb->pmuA; /* ** push inbound doorbell tell iop, driver data write ok ** and wait reply on next hwinterrupt for next Qbuffer post */ writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, ®->inbound_doorbell); } break; case ACB_ADAPTER_TYPE_B: { struct MessageUnit_B *reg = acb->pmuB; /* ** push inbound doorbell tell iop, driver data write ok ** and wait reply on next hwinterrupt for next Qbuffer post */ writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell); } break; case ACB_ADAPTER_TYPE_C: { struct MessageUnit_C __iomem *reg = acb->pmuC; /* ** push inbound doorbell tell iop, driver data write ok ** and wait reply on next hwinterrupt for next Qbuffer post */ writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, ®->inbound_doorbell); } break; } } struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb) { struct QBUFFER __iomem *qbuffer = NULL; switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { struct MessageUnit_A __iomem *reg = acb->pmuA; qbuffer = (struct QBUFFER __iomem *)®->message_rbuffer; } break; case ACB_ADAPTER_TYPE_B: { struct MessageUnit_B *reg = acb->pmuB; qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer; } break; case ACB_ADAPTER_TYPE_C: { struct MessageUnit_C *phbcmu=(struct MessageUnit_C *)acb->pmuC; qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer; } } return qbuffer; } static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb) { struct QBUFFER __iomem *pqbuffer = NULL; switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { struct MessageUnit_A __iomem *reg = acb->pmuA; pqbuffer = (struct QBUFFER __iomem *) ®->message_wbuffer; } break; case ACB_ADAPTER_TYPE_B: { struct MessageUnit_B *reg = acb->pmuB; pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer; } break; case ACB_ADAPTER_TYPE_C: { struct MessageUnit_C *reg=(struct MessageUnit_C *)acb->pmuC; pqbuffer = (struct QBUFFER __iomem *)®->message_wbuffer; } } return pqbuffer; } static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb) { struct QBUFFER __iomem *prbuffer; struct QBUFFER *pQbuffer; uint8_t __iomem *iop_data; int32_t my_empty_len, iop_len, rqbuf_firstindex, rqbuf_lastindex; rqbuf_lastindex = acb->rqbuf_lastindex; rqbuf_firstindex = acb->rqbuf_firstindex; prbuffer = arcmsr_get_iop_rqbuffer(acb); iop_data = (uint8_t __iomem *)prbuffer->data; iop_len = prbuffer->data_len; my_empty_len = (rqbuf_firstindex - rqbuf_lastindex -1)&(ARCMSR_MAX_QBUFFER -1); if (my_empty_len >= iop_len) { while (iop_len > 0) { pQbuffer = (struct QBUFFER *)&acb->rqbuffer[rqbuf_lastindex]; memcpy(pQbuffer, iop_data,1); rqbuf_lastindex++; rqbuf_lastindex %= ARCMSR_MAX_QBUFFER; iop_data++; iop_len--; } acb->rqbuf_lastindex = rqbuf_lastindex; arcmsr_iop_message_read(acb); } else { acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW; } } static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb) { acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED; if (acb->wqbuf_firstindex != acb->wqbuf_lastindex) { uint8_t *pQbuffer; struct QBUFFER __iomem *pwbuffer; uint8_t __iomem *iop_data; int32_t allxfer_len = 0; acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); pwbuffer = arcmsr_get_iop_wqbuffer(acb); iop_data = (uint8_t __iomem *)pwbuffer->data; while ((acb->wqbuf_firstindex != acb->wqbuf_lastindex) && \ (allxfer_len < 124)) { pQbuffer = &acb->wqbuffer[acb->wqbuf_firstindex]; memcpy(iop_data, pQbuffer, 1); acb->wqbuf_firstindex++; acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER; iop_data++; allxfer_len++; } pwbuffer->data_len = allxfer_len; arcmsr_iop_message_wrote(acb); } if (acb->wqbuf_firstindex == acb->wqbuf_lastindex) { acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED; } } static void arcmsr_hba_doorbell_isr(struct AdapterControlBlock *acb) { uint32_t outbound_doorbell; struct MessageUnit_A __iomem *reg = acb->pmuA; outbound_doorbell = readl(®->outbound_doorbell); writel(outbound_doorbell, ®->outbound_doorbell); if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) { arcmsr_iop2drv_data_wrote_handle(acb); } if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) { arcmsr_iop2drv_data_read_handle(acb); } } static void arcmsr_hbc_doorbell_isr(struct AdapterControlBlock *pACB) { uint32_t outbound_doorbell; struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC; /* ******************************************************************* ** Maybe here we need to check wrqbuffer_lock is lock or not ** DOORBELL: din! don! ** check if there are any mail need to pack from firmware ******************************************************************* */ outbound_doorbell = readl(®->outbound_doorbell); writel(outbound_doorbell, ®->outbound_doorbell_clear);/*clear interrupt*/ if(outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK){ arcmsr_iop2drv_data_wrote_handle(pACB); } if(outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK){ arcmsr_iop2drv_data_read_handle(pACB); } #if ARCMSR_FW_POLLING if(outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE){ arcmsr_hbc_message_isr(pACB); /* messenger of "driver to iop commands" */ } #endif return; } static void arcmsr_hba_postqueue_isr(struct AdapterControlBlock *acb) { uint32_t flag_ccb; struct MessageUnit_A __iomem *reg = acb->pmuA; struct ARCMSR_CDB *pARCMSR_CDB; struct CommandControlBlock *pCCB; bool error; while ((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF) { pARCMSR_CDB=(struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/ pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); error= (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0)?TRUE:FALSE; arcmsr_drain_donequeue(acb, pCCB, error); } } static void arcmsr_hbb_postqueue_isr(struct AdapterControlBlock *acb) { uint32_t index; uint32_t flag_ccb; struct MessageUnit_B *reg = acb->pmuB; struct ARCMSR_CDB *pARCMSR_CDB; struct CommandControlBlock *pCCB; bool error; index = reg->doneq_index; while ((flag_ccb = readl(®->done_qbuffer[index])) != 0) { writel(0, ®->done_qbuffer[index]); pARCMSR_CDB=(struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/ pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); error= (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0)?TRUE:FALSE; arcmsr_drain_donequeue(acb, pCCB, error); index++; index %= ARCMSR_MAX_HBB_POSTQUEUE; reg->doneq_index = index; } } static void arcmsr_hbc_postqueue_isr(struct AdapterControlBlock *acb) { struct MessageUnit_C *phbcmu; struct ARCMSR_CDB *arcmsr_cdb; struct CommandControlBlock *ccb; uint32_t flag_ccb, ccb_cdb_phy, throttling = 0; int error; phbcmu = (struct MessageUnit_C *)acb->pmuC; /* areca cdb command done */ /* Use correct offset and size for syncing */ while (readl(&phbcmu->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR){ /* check if command done with no error*/ flag_ccb = readl(&phbcmu->outbound_queueport_low); ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);/*frame must be 32 bytes aligned*/ arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy); ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)?TRUE:FALSE; /* check if command done with no error */ arcmsr_drain_donequeue(acb, ccb, error); if(throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) { writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING, &phbcmu->inbound_doorbell); break; } throttling++; } return; } /* ********************************************************************************** ** Handle a message interrupt ** ** The only message interrupt we expect is in response to a query for the current adapter config. ** We want this in order to compare the drivemap so that we can detect newly-attached drives. ********************************************************************************** */ #if ARCMSR_FW_POLLING static void arcmsr_hba_message_isr(struct AdapterControlBlock *acb) { struct MessageUnit_A *reg = acb->pmuA; /*clear interrupt and message state*/ writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, ®->outbound_intstatus); schedule_work(&acb->arcmsr_do_message_isr_bh); } static void arcmsr_hbb_message_isr(struct AdapterControlBlock *acb) { struct MessageUnit_B *reg = acb->pmuB; /*clear interrupt and message state*/ writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); schedule_work(&acb->arcmsr_do_message_isr_bh); } /* ********************************************************************************** ** Handle a message interrupt ** ** The only message interrupt we expect is in response to a query for the ** current adapter config. ** We want this in order to compare the drivemap so that we can detect newly-attached drives. ********************************************************************************** */ static void arcmsr_hbc_message_isr(struct AdapterControlBlock *acb) { struct MessageUnit_C *reg = acb->pmuC; /*clear interrupt and message state*/ writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, ®->outbound_doorbell_clear); schedule_work(&acb->arcmsr_do_message_isr_bh); } #endif static int arcmsr_handle_hba_isr(struct AdapterControlBlock *acb) { uint32_t outbound_intstatus; struct MessageUnit_A __iomem *reg = acb->pmuA; outbound_intstatus = readl(®->outbound_intstatus) & acb->outbound_int_enable; if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT)) { return 1; } writel(outbound_intstatus, ®->outbound_intstatus); if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) { arcmsr_hba_doorbell_isr(acb); } if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) { arcmsr_hba_postqueue_isr(acb); } #if ARCMSR_FW_POLLING if(outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) { /* messenger of "driver to iop commands" */ arcmsr_hba_message_isr(acb); } #endif return 0; } static int arcmsr_handle_hbb_isr(struct AdapterControlBlock *acb) { uint32_t outbound_doorbell; struct MessageUnit_B *reg = acb->pmuB; outbound_doorbell = readl(reg->iop2drv_doorbell) & acb->outbound_int_enable; if (!outbound_doorbell) return 1; writel(~outbound_doorbell, reg->iop2drv_doorbell); /*in case the last action of doorbell interrupt clearance is cached, this action can push HW to write down the clear bit*/ readl(reg->iop2drv_doorbell); writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell); if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) { arcmsr_iop2drv_data_wrote_handle(acb); } if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK) { arcmsr_iop2drv_data_read_handle(acb); } if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE) { arcmsr_hbb_postqueue_isr(acb); } #if ARCMSR_FW_POLLING if(outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) { /* messenger of "driver to iop commands" */ arcmsr_hbb_message_isr(acb); } #endif return 0; } static int arcmsr_handle_hbc_isr(struct AdapterControlBlock *pACB) { uint32_t host_interrupt_status; struct MessageUnit_C *phbcmu=(struct MessageUnit_C *)pACB->pmuC; /* ********************************************* ** check outbound intstatus ********************************************* */ host_interrupt_status = readl(&phbcmu->host_int_status); if(!host_interrupt_status){ /*it must be share irq*/ return FALSE; } /* MU ioctl transfer doorbell interrupts*/ if(host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR){ arcmsr_hbc_doorbell_isr(pACB); /* messenger of "ioctl message read write" */ } /* MU post queue interrupts*/ if(host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR){ arcmsr_hbc_postqueue_isr(pACB); /* messenger of "scsi commands" */ } return TRUE; } static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb) { switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { if (arcmsr_handle_hba_isr(acb)) { return IRQ_NONE; } } break; case ACB_ADAPTER_TYPE_B: { if (arcmsr_handle_hbb_isr(acb)) { return IRQ_NONE; } } break; case ACB_ADAPTER_TYPE_C: { if(arcmsr_handle_hbc_isr(acb)) { return IRQ_NONE; } } } return IRQ_HANDLED; } static void arcmsr_iop_parking(struct AdapterControlBlock *acb) { if (acb) { /* stop adapter background rebuild */ if (acb->acb_flags & ACB_F_MSG_START_BGRB) { uint32_t intmask_org; acb->acb_flags &= ~ACB_F_MSG_START_BGRB; intmask_org = arcmsr_disable_outbound_ints(acb); arcmsr_stop_adapter_bgrb(acb); arcmsr_flush_adapter_cache(acb); arcmsr_enable_outbound_ints(acb, intmask_org); } } } void arcmsr_post_ioctldata2iop(struct AdapterControlBlock *acb) { int32_t wqbuf_firstindex, wqbuf_lastindex; uint8_t *pQbuffer; struct QBUFFER __iomem *pwbuffer; uint8_t __iomem *iop_data; int32_t allxfer_len = 0; pwbuffer = arcmsr_get_iop_wqbuffer(acb); iop_data = (uint8_t __iomem *)pwbuffer->data; if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) { acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); wqbuf_firstindex = acb->wqbuf_firstindex; wqbuf_lastindex = acb->wqbuf_lastindex; while ((wqbuf_firstindex != wqbuf_lastindex) && (allxfer_len < 124)) { pQbuffer = &acb->wqbuffer[wqbuf_firstindex]; memcpy(iop_data, pQbuffer, 1); wqbuf_firstindex++; wqbuf_firstindex %= ARCMSR_MAX_QBUFFER; iop_data++; allxfer_len++; } acb->wqbuf_firstindex = wqbuf_firstindex; pwbuffer->data_len = allxfer_len; arcmsr_iop_message_wrote(acb); } } static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, struct scsi_cmnd *cmd) { struct CMD_MESSAGE_FIELD *pcmdmessagefld; int retvalue = 0, transfer_len = 0; char *buffer; struct scatterlist *sg; uint32_t controlcode = (uint32_t ) cmd->cmnd[5] << 24 | (uint32_t ) cmd->cmnd[6] << 16 | (uint32_t ) cmd->cmnd[7] << 8 | (uint32_t ) cmd->cmnd[8]; /* 4 bytes: Areca io control code */ sg = (struct scatterlist *)cmd->request_buffer; buffer = kmap_atomic(sg->page, KM_IRQ0) + sg->offset; if (scsi_sg_count(cmd) > 1) { retvalue = ARCMSR_MESSAGE_FAIL; goto message_out; } transfer_len += sg->length; if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) { retvalue = ARCMSR_MESSAGE_FAIL; goto message_out; } pcmdmessagefld = (struct CMD_MESSAGE_FIELD *) buffer; switch(controlcode) { case ARCMSR_MESSAGE_READ_RQBUFFER: { unsigned char *ver_addr; uint8_t *pQbuffer, *ptmpQbuffer; int32_t allxfer_len = 0; ver_addr = kmalloc(1032, GFP_ATOMIC); if (!ver_addr) { retvalue = ARCMSR_MESSAGE_FAIL; goto message_out; } ptmpQbuffer = ver_addr; while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex) && (allxfer_len < 1031)) { pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex]; memcpy(ptmpQbuffer, pQbuffer, 1); acb->rqbuf_firstindex++; acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER; ptmpQbuffer++; allxfer_len++; } if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { struct QBUFFER __iomem *prbuffer; uint8_t __iomem *iop_data; int32_t iop_len; acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; prbuffer = arcmsr_get_iop_rqbuffer(acb); iop_data = prbuffer->data; iop_len = readl(&prbuffer->data_len); while (iop_len > 0) { acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data); acb->rqbuf_lastindex++; acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER; iop_data++; iop_len--; } arcmsr_iop_message_read(acb); } memcpy(pcmdmessagefld->messagedatabuffer, ver_addr, allxfer_len); pcmdmessagefld->cmdmessage.Length = allxfer_len; #if ARCMSR_FW_POLLING if(acb->fw_flag == FW_DEADLOCK) { pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; }else{ pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; } #endif pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; kfree(ver_addr); } break; case ARCMSR_MESSAGE_WRITE_WQBUFFER: { unsigned char *ver_addr; int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex; uint8_t *pQbuffer, *ptmpuserbuffer; ver_addr = kmalloc(1032, GFP_ATOMIC); if (!ver_addr) { retvalue = ARCMSR_MESSAGE_FAIL; goto message_out; } if(acb->fw_flag == FW_DEADLOCK) { pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; }else{ pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; } ptmpuserbuffer = ver_addr; user_len = pcmdmessagefld->cmdmessage.Length; memcpy(ptmpuserbuffer, pcmdmessagefld->messagedatabuffer, user_len); wqbuf_lastindex = acb->wqbuf_lastindex; wqbuf_firstindex = acb->wqbuf_firstindex; if (wqbuf_lastindex != wqbuf_firstindex) { struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)cmd->sense_buffer; arcmsr_post_ioctldata2iop(acb); /* has error report sensedata */ sensebuffer->ErrorCode = 0x70; sensebuffer->SenseKey = ILLEGAL_REQUEST; sensebuffer->AdditionalSenseLength = 0x0A; sensebuffer->AdditionalSenseCode = 0x20; sensebuffer->Valid = 1; retvalue = ARCMSR_MESSAGE_FAIL; } else { my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1) &(ARCMSR_MAX_QBUFFER - 1); if (my_empty_len >= user_len) { while (user_len > 0) { pQbuffer = &acb->wqbuffer[acb->wqbuf_lastindex]; memcpy(pQbuffer, ptmpuserbuffer, 1); acb->wqbuf_lastindex++; acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER; ptmpuserbuffer++; user_len--; } if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) { acb->acb_flags &= ~ACB_F_MESSAGE_WQBUFFER_CLEARED; arcmsr_post_ioctldata2iop(acb); } } else { /* has error report sensedata */ struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)cmd->sense_buffer; sensebuffer->ErrorCode = 0x70; sensebuffer->SenseKey = ILLEGAL_REQUEST; sensebuffer->AdditionalSenseLength = 0x0A; sensebuffer->AdditionalSenseCode = 0x20; sensebuffer->Valid = 1; retvalue = ARCMSR_MESSAGE_FAIL; } } kfree(ver_addr); } break; case ARCMSR_MESSAGE_CLEAR_RQBUFFER: { uint8_t *pQbuffer = acb->rqbuffer; if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; arcmsr_iop_message_read(acb); } acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED; acb->rqbuf_firstindex = 0; acb->rqbuf_lastindex = 0; memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); #if ARCMSR_FW_POLLING if(acb->fw_flag == FW_DEADLOCK) { pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; }else{ pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; } #else pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; #endif } break; case ARCMSR_MESSAGE_CLEAR_WQBUFFER: { uint8_t *pQbuffer = acb->wqbuffer; if(acb->fw_flag == FW_DEADLOCK) { pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; }else{ pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; } if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; arcmsr_iop_message_read(acb); } acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED | ACB_F_MESSAGE_WQBUFFER_READED); acb->wqbuf_firstindex = 0; acb->wqbuf_lastindex = 0; memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); } break; case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: { uint8_t *pQbuffer; if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; arcmsr_iop_message_read(acb); } acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED | ACB_F_MESSAGE_RQBUFFER_CLEARED | ACB_F_MESSAGE_WQBUFFER_READED); acb->rqbuf_firstindex = 0; acb->rqbuf_lastindex = 0; acb->wqbuf_firstindex = 0; acb->wqbuf_lastindex = 0; pQbuffer = acb->rqbuffer; memset(pQbuffer, 0, sizeof(struct QBUFFER)); pQbuffer = acb->wqbuffer; memset(pQbuffer, 0, sizeof(struct QBUFFER)); #if ARCMSR_FW_POLLING if(acb->fw_flag == FW_DEADLOCK) { pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; }else{ pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; } #else pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; #endif } break; case ARCMSR_MESSAGE_RETURN_CODE_3F: { #if ARCMSR_FW_POLLING if(acb->fw_flag == FW_DEADLOCK) { pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; }else{ pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_3F; } #else pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; #endif break; } case ARCMSR_MESSAGE_SAY_HELLO: { char *hello_string = "Hello! I am ARCMSR"; #if ARCMSR_FW_POLLING if(acb->fw_flag == FW_DEADLOCK) { pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; }else{ pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; } #else pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; #endif memcpy(pcmdmessagefld->messagedatabuffer, hello_string , (int16_t)strlen(hello_string)); } break; case ARCMSR_MESSAGE_SAY_GOODBYE: #if ARCMSR_FW_POLLING if(acb->fw_flag == FW_DEADLOCK) { pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; } #endif arcmsr_iop_parking(acb); break; case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: #if ARCMSR_FW_POLLING if(acb->fw_flag == FW_DEADLOCK) { pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; } #endif arcmsr_flush_adapter_cache(acb); break; default: retvalue = ARCMSR_MESSAGE_FAIL; } message_out: sg = scsi_sglist(cmd); kunmap_atomic(buffer - sg->offset, KM_IRQ0); return retvalue; } static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb) { struct list_head *head = &acb->ccb_free_list; struct CommandControlBlock *ccb = NULL; unsigned long flags; spin_lock_irqsave(&acb->ccblist_lock, flags); if (!list_empty(head)) { ccb = list_entry(head->next, struct CommandControlBlock, list); list_del_init(&ccb->list); }else{ spin_unlock_irqrestore(&acb->ccblist_lock, flags); return 0; } spin_unlock_irqrestore(&acb->ccblist_lock, flags); return ccb; } static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb, struct scsi_cmnd *cmd) { switch (cmd->cmnd[0]) { case INQUIRY: { unsigned char inqdata[36]; char *buffer; struct scatterlist *sg; unsigned short use_sg; if (cmd->device->lun) { cmd->result = (DID_TIME_OUT << 16); cmd->scsi_done(cmd); return; } inqdata[0] = TYPE_PROCESSOR; /* Periph Qualifier & Periph Dev Type */ inqdata[1] = 0; /* rem media bit & Dev Type Modifier */ inqdata[2] = 0; /* ISO, ECMA, & ANSI versions */ inqdata[4] = 31; /* length of additional data */ strncpy(&inqdata[8], "Areca ", 8); /* Vendor Identification */ strncpy(&inqdata[16], "RAID controller ", 16); /* Product Identification */ strncpy(&inqdata[32], "R001", 4); /* Product Revision */ use_sg = cmd->use_sg; if (use_sg) { struct scatterlist *sg; sg = (struct scatterlist *) cmd->request_buffer; buffer = kmap_atomic(sg->page, KM_IRQ0) + sg->offset; }else{ buffer = cmd->request_buffer; } memcpy(buffer, inqdata, sizeof(inqdata)); if (cmd->use_sg){ struct scatterlist *sg; sg = (struct scatterlist *) cmd->request_buffer; kunmap_atomic(buffer - sg->offset, KM_IRQ0); } cmd->scsi_done(cmd); } break; case WRITE_BUFFER: case READ_BUFFER: { if (arcmsr_iop_message_xfer(acb, cmd)) cmd->result = (DID_ERROR << 16); cmd->scsi_done(cmd); } break; default: cmd->scsi_done(cmd); } } static int arcmsr_queue_command(struct scsi_cmnd *cmd, void (* done)(struct scsi_cmnd *)) { struct Scsi_Host *host = cmd->device->host; struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; struct CommandControlBlock *ccb; int target = cmd->device->id; int lun = cmd->device->lun; uint8_t scsicmd = cmd->cmnd[0]; cmd->scsi_done = done; cmd->host_scribble = NULL; cmd->result = 0; if((scsicmd == SYNCHRONIZE_CACHE) ||(scsicmd == SEND_DIAGNOSTIC)){ if(acb->devstate[target][lun] == ARECA_RAID_GONE) { cmd->result = (DID_NO_CONNECT << 16); } cmd->scsi_done(cmd); return 0; } if(target == 16){ /* virtual device for iop message transfer */ arcmsr_handle_virtual_command(acb, cmd); return 0; } if(atomic_read(&acb->ccboutstandingcount) >= ARCMSR_MAX_OUTSTANDING_CMD) return SCSI_MLQUEUE_HOST_BUSY; ccb = arcmsr_get_freeccb(acb); if(!ccb) return SCSI_MLQUEUE_HOST_BUSY; if(arcmsr_build_ccb( acb, ccb, cmd ) == FAILED){ cmd->result = (DID_ERROR << 16) | (RESERVATION_CONFLICT << 1); cmd->scsi_done(cmd); return 0; } arcmsr_post_ccb(acb, ccb); return 0; } static bool arcmsr_get_hba_config(struct AdapterControlBlock *acb){ struct MessageUnit_A __iomem *reg = acb->pmuA; char *acb_firm_model = acb->firm_model; char *acb_firm_version = acb->firm_version; char *acb_device_map = acb->device_map; char __iomem *iop_firm_model = (char __iomem *)(®->message_rwbuffer[15]); char __iomem *iop_firm_version = (char __iomem *)(®->message_rwbuffer[17]); char __iomem *iop_device_map = (char __iomem *) (®->message_rwbuffer[21]); int count; writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); if (!arcmsr_hba_wait_msgint_ready(acb)) { printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ miscellaneous data' timeout \n", acb->host->host_no); return false; } count = 8; while (count){ *acb_firm_model = readb(iop_firm_model); acb_firm_model++; iop_firm_model++; count--; } count = 16; while (count){ *acb_firm_version = readb(iop_firm_version); acb_firm_version++; iop_firm_version++; count--; } count=16; while(count){ *acb_device_map=readb(iop_device_map); acb_device_map++; iop_device_map++; count--; } printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n", acb->host->host_no, acb->firm_version, acb->firm_model); acb->signature = readl(®->message_rwbuffer[0]); acb->firm_request_len = readl(®->message_rwbuffer[1]); acb->firm_numbers_queue = readl(®->message_rwbuffer[2]); acb->firm_sdram_size = readl(®->message_rwbuffer[3]); acb->firm_hd_channels = readl(®->message_rwbuffer[4]); acb->firm_cfg_version = readl(®->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/ return true; } static bool arcmsr_get_hbb_config(struct AdapterControlBlock *acb) { struct MessageUnit_B *reg = acb->pmuB; struct pci_dev *pdev = acb->pdev; void *dma_coherent; dma_addr_t dma_coherent_handle; char *acb_firm_model = acb->firm_model; char *acb_firm_version = acb->firm_version; char *acb_device_map = acb->device_map; char __iomem *iop_firm_model; /*firm_model,15,60-67*/ char __iomem *iop_firm_version; /*firm_version,17,68-83*/ char __iomem *iop_device_map; /*firm_version,21,84-99*/ int count; dma_coherent = dma_alloc_coherent(&pdev->dev, sizeof(struct MessageUnit_B), &dma_coherent_handle, GFP_KERNEL); if (!dma_coherent){ printk("arcmsr%d: dma_alloc_coherent got error for hbb mu\n", acb->host->host_no); return false; } acb->dma_coherent_handle_hbb_mu = dma_coherent_handle; reg = (struct MessageUnit_B *)dma_coherent; acb->pmuB = reg; reg->drv2iop_doorbell= (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL); reg->drv2iop_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL_MASK); reg->iop2drv_doorbell = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL); reg->iop2drv_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL_MASK); reg->message_wbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_WBUFFER); reg->message_rbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RBUFFER); reg->message_rwbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RWBUFFER); iop_firm_model = (char __iomem *)(®->message_rwbuffer[15]); /*firm_model,15,60-67*/ iop_firm_version = (char __iomem *)(®->message_rwbuffer[17]); /*firm_version,17,68-83*/ iop_device_map = (char __iomem *)(®->message_rwbuffer[21]); /*firm_version,21,84-99*/ writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell); if (!arcmsr_hbb_wait_msgint_ready(acb)){ printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ miscellaneous data' timeout \n", acb->host->host_no); return false; } count = 8; while (count){ *acb_firm_model = readb(iop_firm_model); acb_firm_model++; iop_firm_model++; count--; } count = 16; while (count){ *acb_firm_version = readb(iop_firm_version); acb_firm_version++; iop_firm_version++; count--; } count=16; while(count){ *acb_device_map=readb(iop_device_map); acb_device_map++; iop_device_map++; count--; } printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n", acb->host->host_no, acb->firm_version, acb->firm_model); acb->signature = readl(®->message_rwbuffer[1]); /*firm_signature,1,00-03*/ acb->firm_request_len=readl(®->message_rwbuffer[2]); /*firm_request_len,1,04-07*/ acb->firm_numbers_queue=readl(®->message_rwbuffer[3]); /*firm_numbers_queue,2,08-11*/ acb->firm_sdram_size=readl(®->message_rwbuffer[4]); /*firm_sdram_size,3,12-15*/ acb->firm_hd_channels=readl(®->message_rwbuffer[5]); /*firm_ide_channels,4,16-19*/ acb->firm_cfg_version=readl(®->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/ /*firm_ide_channels,4,16-19*/ return true; } static bool arcmsr_get_hbc_config(struct AdapterControlBlock *pACB) { uint32_t intmask_org, Index, firmware_state = 0; struct MessageUnit_C *reg = pACB->pmuC; char *acb_firm_model = pACB->firm_model; char *acb_firm_version= pACB->firm_version; char *iop_firm_model = (char *)(®->msgcode_rwbuffer[15]); /*firm_model,15,60-67*/ char *iop_firm_version = (char *)(®->msgcode_rwbuffer[17]); /*firm_version,17,68-83*/ int count; /* disable all outbound interrupt */ intmask_org = readl(®->host_int_mask); /* disable outbound message0 int */ writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, ®->host_int_mask); /* wait firmware ready */ do{ firmware_state = readl(®->outbound_msgaddr1); }while((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK)==0); /* post "get config" instruction */ writel(ARCMSR_INBOUND_MESG0_GET_CONFIG,®->inbound_msgaddr0); writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE,®->inbound_doorbell); /* wait message ready */ for(Index= 0; Index < 2000; Index++){ if(readl(®->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE){ writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, ®->outbound_doorbell_clear);/*clear interrupt*/ break; } udelay(10); }/*max 1 seconds*/ if(Index >= 2000){ printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ miscellaneous data' timeout \n", pACB->host->host_no); return false; } count=8; while(count){ *acb_firm_model = readb(iop_firm_model); acb_firm_model++; iop_firm_model++; count--; } count=16; while(count){ *acb_firm_version = readb(iop_firm_version); acb_firm_version++; iop_firm_version++; count--; } printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n", pACB->host->host_no, pACB->firm_version, pACB->firm_model); pACB->firm_request_len = readl(®->msgcode_rwbuffer[1]); /*firm_request_len,1,04-07*/ pACB->firm_numbers_queue = readl(®->msgcode_rwbuffer[2]); /*firm_numbers_queue,2,08-11*/ pACB->firm_sdram_size = readl(®->msgcode_rwbuffer[3]); /*firm_sdram_size,3,12-15*/ pACB->firm_hd_channels = readl(®->msgcode_rwbuffer[4]); /*firm_ide_channels,4,16-19*/ pACB->firm_cfg_version = readl(®->msgcode_rwbuffer[25]); /*firm_cfg_version,25,100-103*/ /*all interrupt service will be enable at arcmsr_iop_init*/ return true; } static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb) { if(acb->adapter_type == ACB_ADAPTER_TYPE_A) return arcmsr_get_hba_config(acb); else if(acb->adapter_type == ACB_ADAPTER_TYPE_B) return arcmsr_get_hbb_config(acb); else return arcmsr_get_hbc_config(acb); } static int arcmsr_polling_hba_ccbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_ccb) { struct MessageUnit_A __iomem *reg = acb->pmuA; struct CommandControlBlock *ccb; struct ARCMSR_CDB *arcmsr_cdb; uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0; int rtn; bool error; polling_hba_ccb_retry: poll_count++; outbound_intstatus = readl(®->outbound_intstatus) & acb->outbound_int_enable; writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/ while (1) { if ((flag_ccb = readl(®->outbound_queueport)) == 0xFFFFFFFF) { if (poll_ccb_done){ rtn = SUCCESS; break; }else { msleep(25); if (poll_count > 100){ rtn = FAILED; break; } goto polling_hba_ccb_retry; } } arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5)); ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); poll_ccb_done = (ccb == poll_ccb) ? 1:0; if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) { printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" " poll command abort successfully \n" , acb->host->host_no , ccb->pcmd->device->id , ccb->pcmd->device->lun , ccb); ccb->pcmd->result = DID_ABORT << 16; arcmsr_ccb_complete(ccb); continue; } printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" " command done ccb = '0x%p'" "ccboutstandingcount = %d \n" , acb->host->host_no , ccb , atomic_read(&acb->ccboutstandingcount)); continue; } error=(flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0)?TRUE:FALSE; arcmsr_report_ccb_state(acb, ccb, error); } return rtn; } static int arcmsr_polling_hbb_ccbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_ccb) { struct MessageUnit_B *reg = acb->pmuB; struct ARCMSR_CDB *arcmsr_cdb; struct CommandControlBlock *ccb; uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0; int index, rtn; bool error; polling_hbb_ccb_retry: poll_count++; /* clear doorbell interrupt */ writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); while(1){ index = reg->doneq_index; if ((flag_ccb = readl(®->done_qbuffer[index])) == 0) { if (poll_ccb_done){ rtn = SUCCESS; break; }else { msleep(25); if (poll_count > 100){ rtn = FAILED; break; } goto polling_hbb_ccb_retry; } } writel(0, ®->done_qbuffer[index]); index++; /*if last index number set it to 0 */ index %= ARCMSR_MAX_HBB_POSTQUEUE; reg->doneq_index = index; /* check if command done with no error*/ arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5)); ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); poll_ccb_done = (ccb == poll_ccb) ? 1:0; if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) { printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" " poll command abort successfully \n" ,acb->host->host_no ,ccb->pcmd->device->id ,ccb->pcmd->device->lun ,ccb); ccb->pcmd->result = DID_ABORT << 16; arcmsr_ccb_complete(ccb); continue; } printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" " command done ccb = '0x%p'" "ccboutstandingcount = %d \n" , acb->host->host_no , ccb , atomic_read(&acb->ccboutstandingcount)); continue; } error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0)?TRUE:FALSE; arcmsr_report_ccb_state(acb, ccb, error); } return rtn; } static int arcmsr_polling_hbc_ccbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_ccb) { struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; uint32_t flag_ccb, ccb_cdb_phy; struct ARCMSR_CDB *arcmsr_cdb; bool error; struct CommandControlBlock *pCCB; uint32_t poll_ccb_done = 0, poll_count = 0; int rtn; polling_hbc_ccb_retry: poll_count++; while(1){ if((readl(®->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0){ if (poll_ccb_done){ rtn = SUCCESS; break; }else { msleep(25); if (poll_count > 100){ rtn = FAILED; break; } goto polling_hbc_ccb_retry; } } flag_ccb= readl(®->outbound_queueport_low); ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0); arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);/*frame must be 32 bytes aligned*/ pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); poll_ccb_done = (pCCB == poll_ccb) ? 1:0; /* check ifcommand done with no error*/ if((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)){ if(pCCB->startdone == ARCMSR_CCB_ABORTED){ printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" " poll command abort successfully \n" ,acb->host->host_no ,pCCB->pcmd->device->id ,pCCB->pcmd->device->lun ,pCCB); pCCB->pcmd->result = DID_ABORT << 16; arcmsr_ccb_complete(pCCB); continue; } printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" " command done ccb = '0x%p'" "ccboutstandingcount = %d \n" , acb->host->host_no , pCCB , atomic_read(&acb->ccboutstandingcount)); continue; } error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)?TRUE : FALSE; arcmsr_report_ccb_state(acb, pCCB, error); } return rtn; } static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_ccb) { int rtn = 0; switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { rtn = arcmsr_polling_hba_ccbdone(acb,poll_ccb); } break; case ACB_ADAPTER_TYPE_B: { rtn = arcmsr_polling_hbb_ccbdone(acb,poll_ccb); } break; case ACB_ADAPTER_TYPE_C: { rtn = arcmsr_polling_hbc_ccbdone(acb,poll_ccb); } } return rtn; } static int arcmsr_iop_confirm(struct AdapterControlBlock *acb) { uint32_t cdb_phyaddr, cdb_phyaddr_hi32; dma_addr_t dma_coherent_handle; /* ******************************************************************** ** here we need to tell iop 331 our freeccb.HighPart ** if freeccb.HighPart is not zero ******************************************************************** */ dma_coherent_handle = acb->dma_coherent_handle; cdb_phyaddr = (uint32_t)(dma_coherent_handle); cdb_phyaddr_hi32 = (uint32_t)((cdb_phyaddr >> 16) >> 16); acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32; /* *********************************************************************** ** if adapter type B, set window of "post command Q" *********************************************************************** */ switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { if (cdb_phyaddr_hi32 != 0) { struct MessageUnit_A __iomem *reg = acb->pmuA; uint32_t intmask_org; intmask_org = arcmsr_disable_outbound_ints(acb); writel(ARCMSR_SIGNATURE_SET_CONFIG, \ ®->message_rwbuffer[0]); writel(cdb_phyaddr_hi32, ®->message_rwbuffer[1]); writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \ ®->inbound_msgaddr0); if (!arcmsr_hba_wait_msgint_ready(acb)) { printk(KERN_NOTICE "arcmsr%d: ""set ccb high \ part physical address timeout\n", acb->host->host_no); return 1; } arcmsr_enable_outbound_ints(acb, intmask_org); } } break; case ACB_ADAPTER_TYPE_B: { unsigned long post_queue_phyaddr; uint32_t __iomem *rwbuffer; struct MessageUnit_B *reg = acb->pmuB; uint32_t intmask_org; intmask_org = arcmsr_disable_outbound_ints(acb); reg->postq_index = 0; reg->doneq_index = 0; writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell); if (!arcmsr_hbb_wait_msgint_ready(acb)) { printk(KERN_NOTICE "arcmsr%d:can not set diver mode\n", \ acb->host->host_no); return 1; } post_queue_phyaddr = acb->dma_coherent_handle_hbb_mu; rwbuffer = reg->message_rwbuffer; /* driver "set config" signature */ writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++); /* normal should be zero */ writel(cdb_phyaddr_hi32, rwbuffer++); /* postQ size (256 + 8)*4 */ writel(post_queue_phyaddr, rwbuffer++); /* doneQ size (256 + 8)*4 */ writel(post_queue_phyaddr + 1056, rwbuffer++); /* ccb maxQ size must be --> [(256 + 8)*4]*/ writel(1056, rwbuffer); writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell); if (!arcmsr_hbb_wait_msgint_ready(acb)) { printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \ timeout \n",acb->host->host_no); return 1; } arcmsr_hbb_enable_driver_mode(acb); arcmsr_enable_outbound_ints(acb, intmask_org); } break; case ACB_ADAPTER_TYPE_C: { if(cdb_phyaddr_hi32!=0){ struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; if(cdb_phyaddr_hi32!=0){ unsigned char Retries=0x00; do{ printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x \n", acb->adapter_index, cdb_phyaddr_hi32); } while(Retries++ < 100); } writel(ARCMSR_SIGNATURE_SET_CONFIG, ®->msgcode_rwbuffer[0]); writel(cdb_phyaddr_hi32, ®->msgcode_rwbuffer[1]); writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, ®->inbound_msgaddr0); writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); if(!arcmsr_hbc_wait_msgint_ready(acb)){ printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \ timeout \n",acb->host->host_no); return 1; } } } } return 0; } static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb) { uint32_t firmware_state = 0; switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { struct MessageUnit_A __iomem *reg = acb->pmuA; do { firmware_state = readl(®->outbound_msgaddr1); } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0); } break; case ACB_ADAPTER_TYPE_B: { struct MessageUnit_B *reg = acb->pmuB; do { firmware_state = readl(reg->iop2drv_doorbell); } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0); writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell); } break; case ACB_ADAPTER_TYPE_C: { struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; do{ firmware_state = readl(®->outbound_msgaddr1); }while((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK)==0); } } } #if ARCMSR_FW_POLLING static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb) { struct MessageUnit_A __iomem *reg = acb->pmuA; if(unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){ return; }else{ acb->fw_flag = FW_NORMAL; if(atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)){ atomic_set(&acb->rq_map_token,16); } atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); if(atomic_dec_and_test(&acb->rq_map_token)) return; writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ)); } return; } static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb) { struct MessageUnit_B __iomem *reg = acb->pmuB; if(unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){ return; }else{ acb->fw_flag = FW_NORMAL; if(atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)){ atomic_set(&acb->rq_map_token,16); } atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); if(atomic_dec_and_test(&acb->rq_map_token)) return; writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell); mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ)); } return; } static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb) { struct MessageUnit_C __iomem *reg = acb->pmuC; if(unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){ return; }else{ acb->fw_flag = FW_NORMAL; if(atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)){ atomic_set(&acb->rq_map_token,16); } atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); if(atomic_dec_and_test(&acb->rq_map_token)) return; writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ)); } return; } static void arcmsr_request_device_map(unsigned long pacb) { struct AdapterControlBlock *acb = (struct AdapterControlBlock *)pacb; switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { arcmsr_request_hba_device_map(acb); } break; case ACB_ADAPTER_TYPE_B: { arcmsr_request_hbb_device_map(acb); } break; case ACB_ADAPTER_TYPE_C: { arcmsr_request_hbc_device_map(acb); } } } #endif static void arcmsr_start_hba_bgrb(struct AdapterControlBlock *acb) { struct MessageUnit_A __iomem *reg = acb->pmuA; acb->acb_flags |= ACB_F_MSG_START_BGRB; writel(ARCMSR_INBOUND_MESG0_START_BGRB, ®->inbound_msgaddr0); if (!arcmsr_hba_wait_msgint_ready(acb)) { printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ rebulid' timeout \n", acb->host->host_no); } } static void arcmsr_start_hbb_bgrb(struct AdapterControlBlock *acb) { struct MessageUnit_B *reg = acb->pmuB; acb->acb_flags |= ACB_F_MSG_START_BGRB; writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell); if (!arcmsr_hbb_wait_msgint_ready(acb)) { printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ rebulid' timeout \n",acb->host->host_no); } } static void arcmsr_start_hbc_bgrb(struct AdapterControlBlock *pACB) { struct MessageUnit_C *phbcmu=(struct MessageUnit_C *)pACB->pmuC; pACB->acb_flags |= ACB_F_MSG_START_BGRB; writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0); writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell); if(!arcmsr_hbc_wait_msgint_ready(pACB)){ printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ rebulid' timeout \n",pACB->host->host_no); } return; } static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb) { switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: arcmsr_start_hba_bgrb(acb); break; case ACB_ADAPTER_TYPE_B: arcmsr_start_hbb_bgrb(acb); break; case ACB_ADAPTER_TYPE_C: arcmsr_start_hbc_bgrb(acb); } } static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb) { switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { struct MessageUnit_A __iomem *reg = acb->pmuA; uint32_t outbound_doorbell; /* empty doorbell Qbuffer if door bell ringed */ outbound_doorbell = readl(®->outbound_doorbell); /*clear doorbell interrupt */ writel(outbound_doorbell, ®->outbound_doorbell); writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); } break; case ACB_ADAPTER_TYPE_B: { struct MessageUnit_B *reg = acb->pmuB; /*clear interrupt and message state*/ writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell); /* let IOP know data has been read */ } break; case ACB_ADAPTER_TYPE_C: { struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; uint32_t outbound_doorbell; /* empty doorbell Qbuffer if door bell ringed */ outbound_doorbell = readl(®->outbound_doorbell); writel(outbound_doorbell, ®->outbound_doorbell_clear); writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell); } } } static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb) { switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: return; case ACB_ADAPTER_TYPE_B: { struct MessageUnit_B *reg = acb->pmuB; writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell); if(!arcmsr_hbb_wait_msgint_ready(acb)) { printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT"); return; } } break; case ACB_ADAPTER_TYPE_C: return; } return; } static void arcmsr_hardware_reset(struct AdapterControlBlock *acb) { uint8_t value[64]; int i, count = 0; struct MessageUnit_A __iomem *pmuA = acb->pmuA; struct MessageUnit_C __iomem *pmuC = acb->pmuC; u32 temp = 0; /* backup pci config data */ printk("arcmsr%d: executing hw bus reset .....\n", acb->host->host_no); for (i=0; i<64; i++) { pci_read_config_byte(acb->pdev, i, &value[i]); } /* hardware reset signal */ if((acb->dev_id == 0x1680)){ writel(ARCMSR_ARC1680_BUS_RESET, &pmuA->reserved1[0]); }else if((acb->dev_id == 0x1880)){ do{ count++; writel(0xF, &pmuC->write_sequence); writel(0x4, &pmuC->write_sequence); writel(0xB, &pmuC->write_sequence); writel(0x2, &pmuC->write_sequence); writel(0x7, &pmuC->write_sequence); writel(0xD, &pmuC->write_sequence); }while((((temp = readl(&pmuC->host_diagnostic)) | ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5)); writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic); }else{ pci_write_config_byte(acb->pdev, 0x84, 0x20); } msleep(2000); /* write back pci config data */ for (i=0;i<64;i++) { pci_write_config_byte(acb->pdev, i, value[i]); } msleep(1000); return; } static void arcmsr_iop_init(struct AdapterControlBlock *acb) { uint32_t intmask_org; /* disable all outbound interrupt */ intmask_org = arcmsr_disable_outbound_ints(acb); arcmsr_wait_firmware_ready(acb); arcmsr_iop_confirm(acb); /*start background rebuild*/ arcmsr_start_adapter_bgrb(acb); /* empty doorbell Qbuffer if door bell ringed */ arcmsr_clear_doorbell_queue_buffer(acb); arcmsr_enable_eoi_mode(acb); /* enable outbound Post Queue,outbound doorbell Interrupt */ arcmsr_enable_outbound_ints(acb, intmask_org); acb->acb_flags |= ACB_F_IOP_INITED; } static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb) { struct CommandControlBlock *ccb; uint32_t intmask_org; uint8_t rtnval = 0x00; int i = 0; vmk_WarningMessage("%s:\n", __FUNCTION__); //spin_unlock_irq(acb->host->host_lock); if (atomic_read(&acb->ccboutstandingcount) != 0) { /* disable all outbound interrupt */ intmask_org = arcmsr_disable_outbound_ints(acb); /* talk to iop 331 outstanding command aborted */ rtnval = arcmsr_abort_allcmd(acb); /* clear all outbound posted Q */ arcmsr_done4abort_postqueue(acb); for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { ccb = acb->pccb_pool[i]; if (ccb->startdone == ARCMSR_CCB_START) { arcmsr_ccb_complete(ccb); } } atomic_set(&acb->ccboutstandingcount, 0); /* enable all outbound interrupt */ arcmsr_enable_outbound_ints(acb, intmask_org); //spin_lock_irq(acb->host->host_lock); vmk_WarningMessage("%s:No.1 leaving\n", __FUNCTION__); return rtnval; } //spin_lock_irq(acb->host->host_lock); vmk_WarningMessage("%s:No.2 leaving\n", __FUNCTION__); return rtnval; } static int arcmsr_bus_reset(struct scsi_cmnd *cmd) { struct AdapterControlBlock *acb; int rtn = FAILED; int retry=0; vmk_WarningMessage("%s:\n", __FUNCTION__); acb=(struct AdapterControlBlock *) cmd->device->host->hostdata; acb->acb_flags |= ACB_F_BUS_RESET; acb->num_resets++; while(atomic_read(&acb->ccboutstandingcount) != 0 && retry < 6) { arcmsr_interrupt(acb); retry++; } /*if (!arcmsr_iop_reset(acb)) { rtn = FAILED; } else { rtn = SUCCESS; } */ acb->acb_flags &= ~ACB_F_BUS_RESET; return SUCCESS; } static int arcmsr_device_reset(struct scsi_cmnd *cmd) { return SUCCESS; } static int arcmsr_abort_one_cmd(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb) { int rtn; //spin_unlock_irq(acb->host->host_lock); //spin_lock_irq(&acb->eh_lock); rtn = arcmsr_polling_ccbdone(acb, ccb); //spin_unlock_irq(&acb->eh_lock); //spin_lock_irq(acb->host->host_lock); return rtn; } static int arcmsr_abort(struct scsi_cmnd *cmd) { struct AdapterControlBlock *acb = (struct AdapterControlBlock *)cmd->device->host->hostdata; int i = 0; int rtn = FAILED; vmk_WarningMessage("arcmsr%d: abort device command(0x%x) of scsi id = %d lun = %d \n", acb->host->host_no, cmd, cmd->device->id, cmd->device->lun); acb->acb_flags |= ACB_F_ABORT; acb->num_aborts++; /* ************************************************ ** the all interrupt service routine is locked ** we need to handle it as soon as possible and exit ************************************************ */ if (!atomic_read(&acb->ccboutstandingcount)) return rtn; for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { struct CommandControlBlock *ccb = acb->pccb_pool[i]; if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) { ccb->startdone = ARCMSR_CCB_ABORTED; rtn = arcmsr_abort_one_cmd(acb, ccb); break; } } acb->acb_flags &= ~ACB_F_ABORT; return rtn; } static const char *arcmsr_info(struct Scsi_Host *host) { struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; static char buf[256]; char *type; int raid6 = 1; switch (acb->pdev->device) { case PCI_DEVICE_ID_ARECA_1110: case PCI_DEVICE_ID_ARECA_1200: case PCI_DEVICE_ID_ARECA_1202: case PCI_DEVICE_ID_ARECA_1210: raid6 = 0; /*FALLTHRU*/ case PCI_DEVICE_ID_ARECA_1120: case PCI_DEVICE_ID_ARECA_1130: case PCI_DEVICE_ID_ARECA_1160: case PCI_DEVICE_ID_ARECA_1170: case PCI_DEVICE_ID_ARECA_1201: case PCI_DEVICE_ID_ARECA_1220: case PCI_DEVICE_ID_ARECA_1230: case PCI_DEVICE_ID_ARECA_1260: case PCI_DEVICE_ID_ARECA_1270: case PCI_DEVICE_ID_ARECA_1280: type = "SATA"; break; case PCI_DEVICE_ID_ARECA_1680: case PCI_DEVICE_ID_ARECA_1681: case PCI_DEVICE_ID_ARECA_1880: type = "SAS"; break; default: type = "X-TYPE"; break; } sprintf(buf, "Areca %s Host Adapter RAID Controller%s\n %s", type, raid6 ? "( RAID6 capable)" : "", ARCMSR_DRIVER_VERSION); return buf; } F DRIVER_S.TAR;1 driver-source-vmware-esx-drivers-scsi-arcmsr_400.1.20.00.15.vmk.100202-1.0.4.00000.tar open_source_licenses_async_driver_Areca_SATA/SAS_RAID_Host_Bus_Adapter_Driver_1.20.0x .15.vmk.90605.txt VMware ESX & ESXi 4.0 Async Driver -- Areca SATA/SAS RAID Host Bus Adapter Driver 1.20.0x.15.vmk.90605 ================================================================================ The following copyright statements and licenses apply to various open source software components that are distributed with various VMware software products. The VMware product that includes this file does not necessarily use all the open source software components referred to below. ================================================================================ > Areca SATA/SAS RAID Host Bus Adapter Driver 1.20.0x.15.vmk.90605: Areca driver source codes, arcmsr.c & arcmsr.h, are published by Areca Technology Corporation on 8F., No.22, Lane 35, Ji-Hu Rd., Taipei, Taiwan, R.O.C., and copyrighted, (C) 2005 - 2020, by Areca Technology Corporation. All rights reserved. For the license, please refer to LICENSE.txt. From LICENSE.txt: Copyright (C) 2005 - 2020, Areca Technology Corporation All rights reserved. Website: www.areca.com.tw E-mail: support@areca.com.tw This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License version 2 as published by the Free Software Foundation. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc. Redistribution and use in source and binary forms,with or without modification,are permitted provided that the following conditions are met: 1. Redistributions of source code must retain the above copyright notice,this list of conditions and the following disclaimer. 2. Redistributions in binary form must reproduce the above copyright notice,this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. 3. The name of the author may not be used to endorse or promote products derived from this software without specific prior written permission. THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,INCLUDING,BUT NOT LIMITED TO,THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,INDIRECT, INCIDENTAL,SPECIAL,EXEMPLARY,OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT NOT LIMITED TO,PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,WHETHER IN CONTRACT,STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ********************************** GNU General Public License Version 2, June 1991 Copyright (C) 1989, 1991 Free Software Foundation, Inc. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA Everyone is permitted to copy and distribute verbatim copies of this license document, but changing it is not allowed. Preamble The licenses for most software are designed to take away your freedom to share and change it. By contrast, the GNU General Public License is intended to guarantee your freedom to share and change free software--to make sure the software is free for all its users. This General Public License applies to most of the Free Software Foundation's software and to any other program whose authors commit to using it. (Some other Free Software Foundation software is covered by the GNU Library General Public License instead.) You can apply it to your programs, too. When we speak of free software, we are referring to freedom, not price. Our General Public Licenses are designed to make sure that you have the freedom to distribute copies of free software (and charge for this service if you wish), that you receive source code or can get it if you want it, that you can change the software or use pieces of it in new free programs; and that you know you can do these things. To protect your rights, we need to make restrictions that forbid anyone to deny you these rights or to ask you to surrender the rights. These restrictions translate to certain responsibilities for you if you distribute copies of the software, or if you modify it. For example, if you distribute copies of such a program, whether gratis or for a fee, you must give the recipients all the rights that you have. You must make sure that they, too, receive or can get the source code. And you must show them these terms so they know their rights. We protect your rights with two steps: (1) copyright the software, and (2) offer you this license which gives you legal permission to copy, distribute and/or modify the software. Also, for each author's protection and ours, we want to make certain that everyone understands that there is no warranty for this free software. If the software is modified by someone else and passed on, we want its recipients to know that what they have is not the original, so that any problems introduced by others will not reflect on the original authors' reputations. Finally, any free program is threatened constantly by software patents. We wish to avoid the danger that redistributors of a free program will individually obtain patent licenses, in effect making the program proprietary. To prevent this, we have made it clear that any patent must be licensed for everyone's free use or not licensed at all. The precise terms and conditions for copying, distribution and modification follow. TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION 0. This License applies to any program or other work which contains a notice placed by the copyright holder saying it may be distributed under the terms of this General Public License. The "Program", below, refers to any such program or work, and a "work based on the Program" means either the Program or any derivative work under copyright law: that is to say, a work containing the Program or a portion of it, either verbatim or with modifications and/or translated into another language. (Hereinafter, translation is included without limitation in the term "modification".) Each licensee is addressed as "you". Activities other than copying, distribution and modification are not covered by this License; they are outside its scope. The act of running the Program is not restricted, and the output from the Program is covered only if its contents constitute a work based on the Program (independent of having been made by running the Program). Whether that is true depends on what the Program does. 1. You may copy and distribute verbatim copies of the Program's source code as you receive it, in any medium, provided that you conspicuously and appropriately publish on each copy an appropriate copyright notice and disclaimer of warranty; keep intact all the notices that refer to this License and to the absence of any warranty; and give any other recipients of the Program a copy of this License along with the Program. You may charge a fee for the physical act of transferring a copy, and you may at your option offer warranty protection in exchange for a fee. 2. You may modify your copy or copies of the Program or any portion of it, thus forming a work based on the Program, and copy and distribute such modifications or work under the terms of Section 1 above, provided that you also meet all of these conditions: * a) You must cause the modified files to carry prominent notices stating that you changed the files and the date of any change. * b) You must cause any work that you distribute or publish, that in whole or in part contains or is derived from the Program or any part thereof, to be licensed as a whole at no charge to all third parties under the terms of this License. * c) If the modified program normally reads commands interactively when run, you must cause it, when started running for such interactive use in the most ordinary way, to print or display an announcement including an appropriate copyright notice and a notice that there is no warranty (or else, saying that you provide a warranty) and that users may redistribute the program under these conditions, and telling the user how to view a copy of this License. (Exception: if the Program itself is interactive but does not normally print such an announcement, your work based on the Program is not required to print an announcement.) These requirements apply to the modified work as a whole. If identifiable sections of that work are not derived from the Program, and can be reasonably considered independent and separate works in themselves, then this License, and its terms, do not apply to those sections when you distribute them as separate works. But when you distribute the same sections as part of a whole which is a work based on the Program, the distribution of the whole must be on the terms of this License, whose permissions for other licensees extend to the entire whole, and thus to each and every part regardless of who wrote it. Thus, it is not the intent of this section to claim rights or contest your rights to work written entirely by you; rather, the intent is to exercise the right to control the distribution of derivative or collective works based on the Program. In addition, mere aggregation of another work not based on the Program with the Program (or with a work based on the Program) on a volume of a storage or distribution medium does not bring the other work under the scope of this License. 3. You may copy and distribute the Program (or a work based on it, under Section 2) in object code or executable form under the terms of Sections 1 and 2 above provided that you also do one of the following: * a) Accompany it with the complete corresponding machine-readable source code, which must be distributed under the terms of Sections 1 and 2 above on a medium customarily used for software interchange; or, * b) Accompany it with a written offer, valid for at least three years, to give any third party, for a charge no more than your cost of physically performing source distribution, a complete machine- readable copy of the corresponding source code, to be distributed under the terms of Sections 1 and 2 above on a medium customarily used for software interchange; or, * c) Accompany it with the information you received as to the offer to distribute corresponding source code. (This alternative is allowed only for noncommercial distribution and only if you received the program in object code or executable form with such an offer, in accord with Subsection b above.) The source code for a work means the preferred form of the work for making modifications to it. For an executable work, complete source code means all the source code for all modules it contains, plus any associated interface definition files, plus the scripts used to control compilation and installation of the executable. However, as a special exception, the source code distributed need not include anything that is normally distributed (in either source or binary form) with the major components (compiler, kernel, and so on) of the operating system on which the executable runs, unless that component itself accompanies the executable. If distribution of executable or object code is made by offering access to copy from a designated place, then offering equivalent access to copy the source code from the same place counts as distribution of the source code, even though third parties are not compelled to copy the source along with the object code. 4. You may not copy, modify, sublicense, or distribute the Program except as expressly provided under this License. Any attempt otherwise to copy, modify, sublicense or distribute the Program is void, and will automatically terminate your rights under this License. However, parties who have received copies, or rights, from you under this License will not have their licenses terminated so long as such parties remain in full compliance. 5. You are not required to accept this License, since you have not signed it. However, nothing else grants you permission to modify or distribute the Program or its derivative works. These actions are prohibited by law if you do not accept this License. Therefore, by modifying or distributing the Program (or any work based on the Program), you indicate your acceptance of this License to do so, and all its terms and conditions for copying, distributing or modifying the Program or works based on it. 6. Each time you redistribute the Program (or any work based on the Program), the recipient automatically receives a license from the original licensor to copy, distribute or modify the Program subject to these terms and conditions. You may not impose any further restrictions on the recipients' exercise of the rights granted herein. You are not responsible for enforcing compliance by third parties to this License. 7. If, as a consequence of a court judgment or allegation of patent infringement or for any other reason (not limited to patent issues), conditions are imposed on you (whether by court order, agreement or otherwise) that contradict the conditions of this License, they do not excuse you from the conditions of this License. If you cannot distribute so as to satisfy simultaneously your obligations under this License and any other pertinent obligations, then as a consequence you may not distribute the Program at all. For example, if a patent license would not permit royalty-free redistribution of the Program by all those who receive copies directly or indirectly through you, then the only way you could satisfy both it and this License would be to refrain entirely from distribution of the Program. If any portion of this section is held invalid or unenforceable under any particular circumstance, the balance of the section is intended to apply and the section as a whole is intended to apply in other circumstances. It is not the purpose of this section to induce you to infringe any patents or other property right claims or to contest validity of any such claims; this section has the sole purpose of protecting the integrity of the free software distribution system, which is implemented by public license practices. Many people have made generous contributions to the wide range of software distributed through that system in reliance on consistent application of that system; it is up to the author/donor to decide if he or she is willing to distribute software through any other system and a licensee cannot impose that choice. This section is intended to make thoroughly clear what is believed to be a consequence of the rest of this License. 8. If the distribution and/or use of the Program is restricted in certain countries either by patents or by copyrighted interfaces, the original copyright holder who places the Program under this License may add an explicit geographical distribution limitation excluding those countries, so that distribution is permitted only in or among countries not thus excluded. In such case, this License incorporates the limitation as if written in the body of this License. 9. The Free Software Foundation may publish revised and/or new versions of the General Public License from time to time. Such new versions will be similar in spirit to the present version, but may differ in detail to address new problems or concerns. Each version is given a distinguishing version number. If the Program specifies a version number of this License which applies to it and "any later version", you have the option of following the terms and conditions either of that version or of any later version published by the Free Software Foundation. If the Program does not specify a version number of this License, you may choose any version ever published by the Free Software Foundation. 10. If you wish to incorporate parts of the Program into other free programs whose distribution conditions are different, write to the author to ask for permission. For software which is copyrighted by the Free Software Foundation, write to the Free Software Foundation; we sometimes make exceptions for this. Our decision will be guided by the two goals of preserving the free status of all derivatives of our free software and of promoting the sharing and reuse of software generally. NO WARRANTY 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING, REPAIR OR CORRECTION. 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. END OF TERMS AND CONDITIONS How to Apply These Terms to Your New Programs If you develop a new program, and you want it to be of the greatest possible use to the public, the best way to achieve this is to make it free software which everyone can redistribute and change under these terms. To do so, attach the following notices to the program. It is safest to attach them to the start of each source file to most effectively convey the exclusion of warranty; and each file should have at least the "copyright" line and a pointer to where the full notice is found. one line to give the program's name and an idea of what it does. Copyright (C) yyyy name of author This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. Also add information on how to contact you by electronic and paper mail. If the program is interactive, make it output a short notice like this when it starts in an interactive mode: Gnomovision version 69, Copyright (C) year name of author Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type 'show w'. This is free software, and you are welcome to redistribute it under certain conditions; type 'show c' for details. The hypothetical commands 'show w' and 'show c' should show the appropriate parts of the General Public License. Of course, the commands you use may be called something other than 'show w' and 'show c'; they could even be mouse-clicks or menu items--whatever suits your program. You should also get your employer (if you work as a programmer) or your school, if any, to sign a "copyright disclaimer" for the program, if necessary. Here is a sample; alter the names: Yoyodyne, Inc., hereby disclaims all copyright interest in the program 'Gnomovision' (which makes passes at compilers) written by James Hacker. signature of Ty Coon, 1 April 1989 Ty Coon, President of Vice This General Public License does not permit incorporating your program into proprietary programs. If your program is a subroutine library, you may consider it more useful to permit linking proprietary applications with the library. If this is what you want to do, use the GNU Library General Public License instead of this License. ================================================================================ To the extent any open source components are licensed under the GPL and/or LGPL, or other similar licenses that require the source code and/or modifications to source code to be made available (as would be noted above), you may obtain a copy of the source code corresponding to the binaries for such open source components and modifications thereto, if any, (the Source Files ), by downloading the Source Files from VMware's website at http://www.vmware.com/download/open_source.html, or by sending a request, with your name and address to: VMware, Inc., 3401 Hillview Avenue, Palo Alto, CA 94304, United States of America or email info@vmware.com. All such requests should clearly specify: OPEN SOURCE FILES REQUEST, Attention General Counsel. VMware shall mail a copy of the Source Files to you on a CD or equivalent physical medium. This offer to obtain a copy of the Source Files is valid for three years from the date you acquired this Software product. VMware ESX 4.0 Driver CD Use the VMware ESX driver CD to install drivers on ESX or ESXi installations. You can use the driver CD in several ways: A) To install drivers for devices as part of a new ESX installation B) To update existing drivers or install new drivers for an existing ESX installation with esxupdate C) To update existing drivers or install new drivers for an existing ESX or ESXi installation with vihostupdate A) To install drivers for devices as part of a new ESX installation: (for ESX only) Note: This procedure has changed since the 3.5 version of driver CD. You will need the ESX installation DVD to begin. 1. Place the ESX installation DVD in the DVD drive of the host. 2. Restart the host. 3. Accept the terms of the license agreement. 4. Select a keyboard type. 5. When prompted for Custom Drivers, select Yes to install custom drivers. 6. Click Add to eject the ESX installation DVD. 7. Place the driver CD in the DVD drive of the ESX host. 8. Select driver module to import drivers to the ESX host. 9. Click Next to continue. A dialog box displays the following message: Load the system drivers. 10. Click Yes. After loading the driver module, continue installing ESX. After the drivers are installed you are prompted to swap the driver CD with the ESX installation DVD. B) To update or add drivers on existing ESX installations using esxupdate: (for ESX only) 1. Power on the ESX host and log into an account with administrator capability. 2. Place the driver CD in the CD-ROM drive of the ESX host. 3. Mount the driver CD. 4. Navigate to /offline-bundle/ and locate the .zip file. 5. Run the esxupdate command to install drivers using the offline bundle. esxupdate --bundle=.zip update C) To update or add drivers on existing ESX and ESXi installations using vihostupdate: (for both ESX and ESXi) 1. Power on the ESX or ESXi host. 2. Place the driver CD in the CD-ROM drive of the host where either the vSphere CLI package is installed or vMA is hosted. 3. Mount the driver CD. 4. Navigate to /offline-bundle/ and locate the .zip file. 5. Run the vihostupdate command to install drivers using the offline bundle. vihostupdate --install --bundle .zip (For more details on vihostupdate, see the vSphere Command-Line Interface Installation and Reference Guide.) F OPEN_SOU.TXT;1 open_source_licenses_vmware-esx-drivers-scsi-arcmsr_400.1.20.00.15.vmk.100202-1.0.4.00000.txt F README.TXT;1 README.txt F VMWARE_E.RPM;1 vmware-esx-drivers-scsi-arcmsr-400.1.20.00.15.vmk.100202-1.0.4.00000.x86_64.rpm vmware-esx-drivers-scsi-arcmsr-400.1.20.00.15.vmk.100202-1.0.4.000P>@ ,0d71bea4b4fdcfabccaf7db063e5754692d1bdf61QY!ZR2ߎQH(!&>6?d!; G j )/6                   0  T  ( = > ? @ GHI X$Y(\P]\^bdefklCvmware-esx-drivers-scsi-arcmsr400.1.20.00.15.vmk.1002021.0.4.00000arcmsr: scsi driver for VMware ESXAreca (ARC-11xx/12xx/16xx/18xx) SATA/SAS RAID Controller DriverKApa-lin-bld378.eng.vmware.comDebiansee /usr/share/doc/vmware-esx-drivers-scsi-arcmsr/copyrightConverted/unknownlinuxx86_64#!/bin/sh set -e mkdir /tmp/alien.$$ perl -pe '$_=unpack("u",$_)' << '__EOF__' > /tmp/alien.$$/script M:68@6R`M>"`B+W5S /tmp/alien.$$/script M(PHC($-/4RUO;FQY.R!S8VAE9'5L92!R96)U:6QD(&]F(&EN:71R9"X@(%1H M:7,@8GD@:71S96QF('=I;&P*(R!S8VAE9'5L92!A(')E8G5I;&0@;V8@:6YI M=')D(&QA=&5R+"!B=70@:70@:7,@;F]T(&%S"B,@&-F9RUB;V]T(&-A;B!F86EL(&QA M=&5R"B,@86YD('EO=2!W;W5L9"!N979E&-F9RUB;V]T("TM /tmp/alien.$$/script M:68@6R`M>"`B+W5S /tmp/alien.$$/script M(PHC($-/4RUO;FQY.R!S8VAE9'5L92!R96)U:6QD(&]F(&EN:71R9"X@(%1H M:7,@8GD@:71S96QF('=I;&P*(R!S8VAE9'5L92!A(')E8G5I;&0@;V8@:6YI M=')D(&QA=&5R+"!B=70@:70@:7,@;F]T(&%S"B,@&-F9RUB;V]T(&-A;B!F86EL(&QA M=&5R"B,@86YD('EO=2!W;W5L9"!N979E&-F9RUB;V]T("TM159ceb27e1f2112c59b67313dc148cb1411ef0cef9ed8b82cc675daf9f98a6d6f34da4f48c91f8f0b414488c71c3aa1erootrootrootrootrootrootvmware-esx-drivers-scsi-arcmsr-400.1.20.00.15.vmk.100202-1.0.4.00000.src.rpmvmware-esx-drivers-scsi-arcmsr@@@@ @@JJperlcoreutilsDriverAPI-9.0/bin/sh/bin/sh/bin/sh/bin/shrpmlib(PayloadFilesHavePrefix)rpmlib(CompressedFileNames)4.0-13.0.4-14.0.5/bin/sh/bin/sh/bin/sh/bin/shhhhʗm|?W400.1.20.00.15.vmk.100202-1.0.4.00000areca-arcmsr.mfarcmsr.xmlarcmsr.o/etc/vmware/init/manifests//etc/vmware/pciid//usr/lib/vmware/vmkmod/-O2 -gcpiogzip9x86_64x86_64-redhat-linux?GK/build/mts/release/bora-262812/tmp/tmphpYXc_.vibpublish-rpm/vmware-esx-drivers-scsi-arcmsr-400.1.20.00.15.vmk.100202-1.0.4.00000.x86_64.rpm} x[Օ%I$dݐ%O]Ŗ-K[KldyLt ma:3̟6)giP5i2ڄ !$$<$3|ߨM{{K\_/J 5zT=+ӿjQ ZNqȈLrzHaÑp!@N2G-h4g د+C>oT'*t=Xoo(5/N~LWVdWtzIAb=>͊o];+~gw\ UTV.3,ּP;hoV@Hu\`(w/@ .w&0=[&2(įRx} F[hl4E8z.r{ nJƭrEXP*뚹k5q#hXǹ;3$TahPs}+a?ܺhP J:OtNw]uΡ A H6+] V (%IYR6KY*Hf)V6K,Jf1X,_)ۥKm2E}Rl/]ʕRT d6Jv)}SK,P$΀? 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MD$ahXsekn}#ͅ?#!M"B7H|!؝͉B%~ۚBx[jxݩE2gwe*PK /g>A1.20.00.15_100202_Build100820/PKܒ=D( <1.20.00.15_100202_Build100820/arcmsr.isoPKm<[/DB ( 1.20.00.15_100202_Build100820/README.txtPK'ESX_ESXi_4.1/1.20.00.15_100202_Build100820/README.txt0000755000000000000000000000470311406741376015013 0ustar Areca Driver Disk for ARC-11XX/12XX/16XX/18XX on VMware ESX(i) 4.X Notice : VMware officially does not support async drivers' device to be the ESXi 4.x system disks. Consequently, Areca RAID volumes can only be the data storages on ESXi 4.x. Installation for VMware ESX 4.X on Areca RAID volume(s): 1). Install Areca SAS RAID controller, and configure RAID/volume(s). 2). During ESX installation, select "Add" in the Custom Drivers menu, insert the device driver CD, and click OK. 3). Browse for the driver to install and click OK. 4). When prompted, replace the driver CD with the ESX 4.X CD, and then click Next. 5). Continue the ESX 4.X installation. 6). When finished, reboot the server. Installation for Areca RAID volume(s) as data storage: for VMware ESX4.X: 1). Power on ESX4.0 server. 2). Mount the driver ISO into the local director, #@$ mkdir /ISO #@$ mount /dev/cdrom /ISO 3). Use the following command to install the driver: #@$ esxupdate update --bundle=/ISO/offline-bundle/ARC-arcmsr-1.20.00.15.vmk.100202-offline_bundle-262812.zip --maintenancemode 4). Run the following commands: List the driver package details and verify the new driver installed: #@$ esxupdate query --vib-view List the vmkernel modules: #@$ vmkload_mod -l grep arcmsr Verify that the OS recognizes Areca RAID controller: #@$ esxcfg-scsidevs -a 5). Reboot ESX 4.X server. for VMware ESXi 4.X: 1). Insert the Areca driver disk on your Windows system. 2). Download and install the VMware vSphere Client and VMware vSphere CLI on your Windows system. 3). Launch VMware vSphere Client and login the ESXi 4.X server. 4). Through VMware Vsphere Client, set ESXi 4.X server into "Maintenance Mode".(select Inventory-->Summary tab-->Enter Maintanence Mode) 5). Launch VMware vSphere CLI. 6). key in "cd bin" on VMware vSphere CLI. 7). key in "perl vihostupdate.pl -server ESXi_4.X_IP_address -username root -password "root's password" -b CD/DVD_ROM_directory:\offline-bundle\ARC-arcmsr-1.20.00.15.vmk.100202-offline_bundle-262812.zip --nosigcheck -i" on VMware vSphere CLI 8). After loading Areca driver is finished, close VMware vSphere CLI. 9). Set the ESXi 4.X server as "maintenance mode" through VMware Vsphere Client. 10). Reboot ESXi 4.X server. 11). As the ESXi 4.X server comes back, you should see the storage device(s) on the ESXi 4.X server through VMware vSphere Client. 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